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arm: Adjust cost of vector of constant zero

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Neon vector comparisons have a dedicated version when comparing with
constant zero: it means its cost is free.

Adjust the cost in arm_rtx_costs_internal accordingly, for Neon only,
since MVE does not support this.

2021-01-28  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/
	PR target/98730
	* config/arm/arm.c (arm_rtx_costs_internal): Adjust cost of vector
	of constant zero for comparisons.

	gcc/testsuite/
	PR target/98730
	* gcc.target/arm/simd/vceqzq_p64.c: Update expected result.
This commit is contained in:
Christophe Lyon 2021-01-28 17:55:45 +00:00
parent e28bd09498
commit 31a0ab9213
2 changed files with 17 additions and 5 deletions
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20
gcc/config/arm/arm.c
View file

@ -11211,11 +11211,23 @@ arm_rtx_costs_internal (rtx x, enum rtx_code code, enum rtx_code outer_code,
return true; return true;
case EQ: case EQ:
case NE:
case LT:
case LE:
case GT:
case GE: case GE:
case GT:
case LE:
case LT:
/* Neon has special instructions when comparing with 0 (vceq, vcge, vcgt,
vcle and vclt). */
if (TARGET_NEON
&& TARGET_HARD_FLOAT
&& (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode))
&& (XEXP (x, 1) == CONST0_RTX (mode)))
{
*cost = 0;
return true;
}
/* Fall through. */
case NE:
case LTU: case LTU:
case LEU: case LEU:
case GEU: case GEU:

2
gcc/testsuite/gcc.target/arm/simd/vceqzq_p64.c
View file

@ -15,4 +15,4 @@ void func()
result2 = vceqzq_p64 (v2); result2 = vceqzq_p64 (v2);
} }
/* { dg-final { scan-assembler-times "vceq\.i32\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" 2 } } */ /* { dg-final { scan-assembler-times "vceq\.i32\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, #0\n" 2 } } */