LoongArch: Add sign_extend pattern for 32-bit rotate shift
Remove a redundant sign extension. gcc/ChangeLog: * config/loongarch/loongarch.md (rotrsi3_extend): New define_insn. gcc/testsuite/ChangeLog: * gcc.target/loongarch/rotrw.c: New test.
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2 changed files with 27 additions and 0 deletions
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@ -2893,6 +2893,16 @@
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[(set_attr "type" "shift,shift")
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(set_attr "mode" "<MODE>")])
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(define_insn "rotrsi3_extend"
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[(set (match_operand:DI 0 "register_operand" "=r,r")
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(sign_extend:DI
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(rotatert:SI (match_operand:SI 1 "register_operand" "r,r")
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(match_operand:SI 2 "arith_operand" "r,I"))))]
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"TARGET_64BIT"
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"rotr%i2.w\t%0,%1,%2"
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[(set_attr "type" "shift,shift")
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(set_attr "mode" "SI")])
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;; The following templates were added to generate "bstrpick.d + alsl.d"
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;; instruction pairs.
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;; It is required that the values of const_immalsl_operand and
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17
gcc/testsuite/gcc.target/loongarch/rotrw.c
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17
gcc/testsuite/gcc.target/loongarch/rotrw.c
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@ -0,0 +1,17 @@
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/* { dg-do compile } */
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/* { dg-options "-O2" } */
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/* { dg-final { scan-assembler "rotr\\.w\t\\\$r4,\\\$r4,\\\$r5" } } */
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/* { dg-final { scan-assembler "rotri\\.w\t\\\$r4,\\\$r4,5" } } */
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/* { dg-final { scan-assembler-not "slli\\.w" } } */
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unsigned
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rotr (unsigned a, unsigned b)
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{
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return a >> b | a << 32 - b;
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}
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unsigned
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rotri (unsigned a)
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{
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return a >> 5 | a << 27;
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}
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