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arm: more testsutie fallout for mve move-immediate changes

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Unfortunately, there is more fall-out in the testsuite for my changes
to use MVE move-immediate operations instead of literal pool loads.
Fixed as follows:

gcc/testsuite/ChangeLog:
	* gcc.target/arm/simd/mve-vcmp-f32-2.c: Adjust expected output.
	* gcc.target/arm/simd/pr100757.c: Likewise.
	* gcc.target/arm/simd/pr100757-2.c: Likewise.
	* gcc.target/arm/simd/pr100757-3.c: Likewise.
	* gcc.target/arm/simd/pr100757-4.c: Likewise.
This commit is contained in:
Richard Earnshaw 2022-06-20 16:18:36 +01:00
parent a78e5d307c
commit 2eb3adb43e
5 changed files with 29 additions and 14 deletions
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6
gcc/testsuite/gcc.target/arm/simd/mve-vcmp-f32-2.c
View file

@ -28,5 +28,7 @@ FUNC(>=, vcmpge)
/* { dg-final { scan-assembler-times {\tvcmp.f32\tle, q[0-9]+, q[0-9]+\n} 1 } } */
/* { dg-final { scan-assembler-times {\tvcmp.f32\tgt, q[0-9]+, q[0-9]+\n} 1 } } */
/* { dg-final { scan-assembler-times {\tvcmp.f32\tge, q[0-9]+, q[0-9]+\n} 1 } } */
/* { dg-final { scan-assembler-times {\t.word\t1073741824\n} 24 } } */ /* Constant 2.0f. */
/* { dg-final { scan-assembler-times {\t.word\t1077936128\n} 24 } } */ /* Constant 3.0f. */
/* { dg-final { scan-assembler-times {\tvmov\.f32\tq[0-7], #2\.0e\+0 @ v4sf} 6 } } */
/* { dg-final { scan-assembler-not {\t.word\t1073741824\n} } } */ /* Constant 2.0f. */
/* { dg-final { scan-assembler-times {\tvmov\.f32\tq[0-7], #3\.0e\+0 @ v4sf} 6 } } */
/* { dg-final { scan-assembler-not {\t.word\t1077936128\n} } } */ /* Constant 3.0f. */

9
gcc/testsuite/gcc.target/arm/simd/pr100757-2.c
View file

@ -13,8 +13,11 @@ int fn1(int d) {
return c;
}
/* { dg-final { scan-assembler-times {\t.word\t1073741824\n} 4 } } */ /* Constant 2.0f. */
/* { dg-final { scan-assembler-times {\t.word\t4\n} 4 } } */ /* Initial value for c. */
/* { dg-final { scan-assembler-times {\t.word\t5\n} 4 } } */ /* Possible value for c. */
/* { dg-final { scan-assembler-times {\tvmov\.f32\tq[0-7], #2\.0e\+0 @ v4sf} 1 } } */
/* { dg-final { scan-assembler-not {\t.word\t1073741824\n} } } */
/* { dg-final { scan-assembler-times {\tvmov\.i32\tq[0-7], #0x4 @ v4si} 1 } } */
/* { dg-final { scan-assembler-not {\t.word\t4\n} } } */
/* { dg-final { scan-assembler-times {\tvmov\.i32\tq[0-7], #0x5 @ v4si} 1 } } */
/* { dg-final { scan-assembler-not {\t.word\t5\n} } } */
/* { dg-final { scan-assembler-not {\t.word\t1\n} } } */ /* 'true' mask. */
/* { dg-final { scan-assembler-not {\t.word\t0\n} } } */ /* 'false' mask. */

9
gcc/testsuite/gcc.target/arm/simd/pr100757-3.c
View file

@ -13,8 +13,11 @@ float fn1(int d) {
return c;
}
/* { dg-final { scan-assembler-times {\t.word\t1073741824\n} 4 } } */ /* Constant 2.0f. */
/* { dg-final { scan-assembler-times {\t.word\t1084227584\n} 4 } } */ /* Initial value for c (4.0). */
/* { dg-final { scan-assembler-times {\t.word\t1082130432\n} 4 } } */ /* Possible value for c (5.0). */
/* { dg-final { scan-assembler-times {\tvmov\.f32\tq[0-7], #2\.0e\+0 @ v4sf} 1 } } */
/* { dg-final { scan-assembler-not {\t.word\t1073741824\n} } } */
/* { dg-final { scan-assembler-times {\tvmov\.f32\tq[0-7], #4\.0e\+0 @ v4sf} 1 } } */
/* { dg-final { scan-assembler-not {\t.word\t1084227584\n} } } */
/* { dg-final { scan-assembler-times {\tvmov\.f32\tq[0-7], #5\.0e\+0 @ v4sf} 1 } } */
/* { dg-final { scan-assembler-not {\t.word\t1082130432\n} } } */
/* { dg-final { scan-assembler-not {\t.word\t1\n} } } */ /* 'true' mask. */
/* { dg-final { scan-assembler-not {\t.word\t0\n} } } */ /* 'false' mask. */

10
gcc/testsuite/gcc.target/arm/simd/pr100757-4.c
View file

@ -13,7 +13,11 @@ int fn1(int d) {
return c;
}
/* { dg-final { scan-assembler-times {\t.word\t0\n} 4 } } */ /* 'false' mask. */
/* { dg-final { scan-assembler-times {\tvmov\.i32\tq[0-7], #0 @ v4si} 1 } } */
/* { dg-final { scan-assembler-not {\t.word\t0\n} } } */ /* 'false' mask. */
/* { dg-final { scan-assembler-not {\t.word\t1\n} } } */ /* 'true' mask. */
/* { dg-final { scan-assembler-times {\t.word\t2\n} 4 } } */ /* Initial value for c. */
/* { dg-final { scan-assembler-times {\t.word\t3\n} 4 } } */ /* Possible value for c. */
/* { dg-final { scan-assembler-times {vmov\.i32\tq[0-7], #0x2 @ v4si} 1 } } */
/* { dg-final { scan-assembler-not {\t.word\t2\n} } } */ /* Initial value for c. */
/* { dg-final { scan-assembler-times {vmov\.i32\tq[0-7], #0x3 @ v4si} 1 } } */
/* { dg-final { scan-assembler-not {\t.word\t3\n} } } */ /* Possible value for c. */

9
gcc/testsuite/gcc.target/arm/simd/pr100757.c
View file

@ -13,7 +13,10 @@ int fn1(int d) {
return c;
}
/* { dg-final { scan-assembler-times {\t.word\t0\n} 4 } } */ /* 'false' mask. */
/* { dg-final { scan-assembler-times {\tvmov\.i32\tq[0-7], #0 @ v4si} 1 } } */
/* { dg-final { scan-assembler-not {\t.word\t0\n} } } */ /* 'false' mask. */
/* { dg-final { scan-assembler-not {\t.word\t1\n} } } */ /* 'true' mask. */
/* { dg-final { scan-assembler-times {\t.word\t2\n} 4 } } */ /* Initial value for c. */
/* { dg-final { scan-assembler-times {\t.word\t3\n} 4 } } */ /* Possible value for c. */
/* { dg-final { scan-assembler-times {\tvmov\.i32\tq[0-7], #0x2 @ v4si} 1 } } */
/* { dg-final { scan-assembler-not {\t.word\t2\n} } } */ /* Initial value for c. */
/* { dg-final { scan-assembler-times {\tvmov\.i32\tq[0-7], #0x3 @ v4si} 1 } } */
/* { dg-final { scan-assembler-not {\t.word\t3\n} } } */ /* Possible value for c. */