Fix FAIL: gcc.target/i386/pr87007-5.c
The following fixes the gcc.target/i386/pr87007-5.c testcase which changed code generation again after the recent sinking improvements. We now have vxorps %xmm0, %xmm0, %xmm0 vsqrtsd d2(%rip), %xmm0, %xmm0 and a necessary xor again in one case, the other vsqrtsd has a register source and a properly zeroing load: vmovsd d3(%rip), %xmm0 testl %esi, %esi jg .L11 .L3: vsqrtsd %xmm0, %xmm0, %xmm0 the following patch adjusts the scan. * gcc.target/i386/pr87007-5.c: Update comment, adjust subtest.
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1 changed files with 4 additions and 2 deletions
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@ -1,6 +1,8 @@
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/* { dg-do compile } */
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/* { dg-options "-Ofast -march=skylake-avx512 -mfpmath=sse -fno-tree-vectorize -fdump-tree-cddce3-details -fdump-tree-lsplit-optimized" } */
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/* Load of d2/d3 is hoisted out, vrndscalesd will reuse loades register to avoid partial dependence. */
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/* Load of d2/d3 is hoisted out, the loop is split, store of d1 and sqrt
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are sunk out of the loop and the loop is elided. One vsqrtsd with
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memory operand needs a xor to avoid partial dependence. */
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#include<math.h>
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@ -17,4 +19,4 @@ foo (int n, int k)
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/* { dg-final { scan-tree-dump "optimized: loop split" "lsplit" } } */
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/* { dg-final { scan-tree-dump-times "removing loop" 2 "cddce3" } } */
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/* { dg-final { scan-assembler-times "vxorps\[^\n\r\]*xmm\[0-9\]" 0 } } */
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/* { dg-final { scan-assembler-times "vxorps\[^\n\r\]*xmm\[0-9\]" 1 } } */
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