MIPS: Add speculation_barrier support

speculation_barrier for MIPS needs sync+jr.hb (r2+),
so we implement __speculation_barrier in libgcc, like arm32 does.

gcc/ChangeLog:
	* config/mips/mips-protos.h (mips_emit_speculation_barrier): New
	prototype.
	* config/mips/mips.cc (speculation_barrier_libfunc): New static
	variable.
	(mips_init_libfuncs): Initialize it.
	(mips_emit_speculation_barrier): New function.
	* config/mips/mips.md (speculation_barrier): Call
	mips_emit_speculation_barrier.

libgcc/ChangeLog:
	* config/mips/lib1funcs.S: New file.
	define __speculation_barrier and include mips16.S.
	* config/mips/t-mips: define LIB1ASMSRC as mips/lib1funcs.S.
	define LIB1ASMFUNCS as _speculation_barrier.
	set version info for __speculation_barrier.
	* config/mips/libgcc-mips.ver: New file.
	* config/mips/t-mips16: don't define LIB1ASMSRC as mips16.S
	included in lib1funcs.S now.

gcc/config/mips/mips-protos.h

@@ -388,4 +388,6 @@ extern void mips_register_frame_header_opt (void);
 extern void mips_expand_vec_cond_expr (machine_mode, machine_mode, rtx *);
 extern void mips_expand_vec_cmp_expr (rtx *);
 
+extern void mips_emit_speculation_barrier_function (void);
+
 #endif /* ! GCC_MIPS_PROTOS_H */

gcc/config/mips/mips.cc

@@ -13611,6 +13611,9 @@ mips_autovectorize_vector_modes (vector_modes *modes, bool)
   return 0;
 }
 
+
+static GTY (()) rtx speculation_barrier_libfunc;
+
 /* Implement TARGET_INIT_LIBFUNCS.  */
 
 static void
@@ -13680,6 +13683,7 @@ mips_init_libfuncs (void)
       synchronize_libfunc = init_one_libfunc ("__sync_synchronize");
       init_sync_libfuncs (UNITS_PER_WORD);
     }
+  speculation_barrier_libfunc = init_one_libfunc ("__speculation_barrier");
 }
 
 /* Build up a multi-insn sequence that loads label TARGET into $AT.  */
@@ -19092,6 +19096,14 @@ mips_avoid_hazard (rtx_insn *after, rtx_insn *insn, int *hilo_delay,
       }
 }
 
+/* Emit a speculation barrier.
+   JR.HB is needed, so we put speculation_barrier_libfunc in libgcc.  */
+void
+mips_emit_speculation_barrier_function ()
+{
+  emit_library_call (speculation_barrier_libfunc, LCT_NORMAL, VOIDmode);
+}
+
 /* A SEQUENCE is breakable iff the branch inside it has a compact form
    and the target has compact branches.  */
 

gcc/config/mips/mips.md

@@ -160,6 +160,8 @@
   ;; The `.insn' pseudo-op.
   UNSPEC_INSN_PSEUDO
   UNSPEC_JRHB
+
+  VUNSPEC_SPECULATION_BARRIER
 ])
 
 (define_constants
@@ -7455,6 +7457,16 @@
   mips_expand_conditional_move (operands);
   DONE;
 })
+
+(define_expand "speculation_barrier"
+  [(unspec_volatile [(const_int 0)] VUNSPEC_SPECULATION_BARRIER)]
+  ""
+  "
+  mips_emit_speculation_barrier_function ();
+  DONE;
+  "
+)
+
 
 ;;
 ;;  ....................

libgcc/config/mips/lib1funcs.S

@@ -0,0 +1,65 @@
+/* Copyright (C) 2023 Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+//#include "mips16.S"
+
+#ifdef L_speculation_barrier
+
+/* MIPS16e1 has no sync/jr.hb instructions, and MIPS16e2 lacks of jr.hb.
+   So, we use normal MIPS code here, just like what we do for __sync_*.  */
+	.set nomips16
+
+	.set noreorder
+	.globl	__speculation_barrier
+	.ent	__speculation_barrier
+
+__speculation_barrier:
+	.set	push
+#if __mips >= 2
+	sync /* complementation barrier for memory.  */
+#elif defined (__linux)
+	/* MIPS1 has no sync, while Linux can trap&emu sync.  */
+	/* FIXME: Will somebody use linux/gcc for MIPS1/baremetal?  */
+	.word 0x0000000f
+#endif
+
+
+#if __mips_isa_rev >= 1
+	/* Binutils claims that JR in R1 can do same as jr.hb.
+	   R6 changes the encoding of jr.hb.  */
+	jr.hb	$ra /* Jump with instruction hazard barrier.  */
+#else
+	/* ssnop is actually available since R5500,
+	   and it will be decoded as nop on earlier processors.
+	   gas can only recognize it with -march=mips1 since 2.21.
+	   MIPS1 to MIPSr1: R10000 have 7 stage pipeline,
+	   so 8 ssnop is sufficient to block all speculation on all CPUs.  */
+	.rept 8
+	.word	0x00000040 /* The encoding of ssnop.  */
+	.endr
+	/* jr.hb will be decoded as jr on earlier processors.  */
+	.word	0x03e00408 /* The encoding of jr.hb $ra.  */
+#endif
+	.set	pop
+	.end	__speculation_barrier
+
+	.set reorder
+#endif

libgcc/config/mips/libgcc-mips.ver

@@ -0,0 +1,21 @@
+# Copyright (C) 2023 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+GCC_14.0 {
+  __speculation_barrier
+}

libgcc/config/mips/t-mips

@@ -7,3 +7,10 @@ softfp_truncations :=
 softfp_exclude_libgcc2 := n
 
 LIB2ADD_ST += $(srcdir)/config/mips/lib2funcs.c
+
+
+LIB1ASMSRC = mips/lib1funcs.S
+LIB1ASMFUNCS = _speculation_barrier
+
+# Version these symbols if building libgcc.so.
+SHLIB_MAPFILES += $(srcdir)/config/mips/libgcc-mips.ver

libgcc/config/mips/t-mips16

@@ -16,8 +16,7 @@
 # along with GCC; see the file COPYING3.  If not see
 # <http://www.gnu.org/licenses/>.
 
-LIB1ASMSRC = mips/mips16.S
-LIB1ASMFUNCS = _m16addsf3 _m16subsf3 _m16mulsf3 _m16divsf3 \
+LIB1ASMFUNCS += _m16addsf3 _m16subsf3 _m16mulsf3 _m16divsf3 \
 	_m16eqsf2 _m16nesf2 _m16gtsf2 _m16gesf2 _m16lesf2 _m16ltsf2 \
 	_m16unordsf2 \
 	_m16fltsisf _m16fix_truncsfsi _m16fltunsisf \