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Restrict i386 flag setting shift patterns

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From-SVN: r31202
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Bernd Schmidt 2000-01-04 11:49:01 +00:00 • committed by Bernd Schmidt
parent c8b313e75f
commit 28cefcd2b6
2 changed files with 62 additions and 117 deletions
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8
gcc/ChangeLog
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@ -1,3 +1,11 @@
2000-01-04 Bernd Schmidt <bernds@cygnus.co.uk>
* i386.md (ashlsi3_cmpno): Don't accept variables shifts.
(ashlhi3_cmpno, ashlqi3_cmpno, ashrsi3_cmpno, ashrhi3_cmpno,
ashrqi3_cmpno, lshrsi3_cmpno, lshrhi3_cmpno, lshrqi3_cmpno): Likewise.
(rotlsi3_cmpno, rotlhi3_cmpno, rotlqi3_cmpno, rotrsi3_cmpno,
rotrhi3_cmpno, rotrqi3_cmpno): Likewise.
2000-01-04 Martin von Löwis <loewis@informatik.hu-berlin.de>
* ginclude/stdbool.h: Support compilation as C++.

171
gcc/config/i386/i386.md
View file

@ -5597,11 +5597,14 @@
(match_dup 2)))]
"operands[2] = GEN_INT (1 << INTVAL (operands[2]));")
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
(define_insn "*ashlsi3_cmpno"
[(set (reg:CCNO 17)
(compare:CCNO
(ashift:SI (match_operand:SI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "nonmemory_operand" "cI"))
(match_operand:QI 2 "immediate_operand" "I"))
(const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(ashift:SI (match_dup 1) (match_dup 2)))]
@ -5670,11 +5673,14 @@
]
(const_string "ishift")))])
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
(define_insn "*ashlhi3_cmpno"
[(set (reg:CCNO 17)
(compare:CCNO
(ashift:HI (match_operand:HI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "nonmemory_operand" "cI"))
(match_operand:QI 2 "immediate_operand" "I"))
(const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(ashift:HI (match_dup 1) (match_dup 2)))]
@ -5757,11 +5763,14 @@
]
(const_string "ishift")))])
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
(define_insn "*ashlqi3_cmpno"
[(set (reg:CCNO 17)
(compare:CCNO
(ashift:QI (match_operand:QI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "nonmemory_operand" "cI"))
(match_operand:QI 2 "immediate_operand" "I"))
(const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
(ashift:QI (match_dup 1) (match_dup 2)))]
@ -5923,18 +5932,20 @@
sar{l}\\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")])
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
(define_insn "*ashrsi3_cmpno"
[(set (reg:CCNO 17)
(compare:CCNO
(ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
(match_operand:QI 2 "nonmemory_operand" "I,c"))
(ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I"))
(const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(ashiftrt:SI (match_dup 1) (match_dup 2)))]
"ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
"@
sar{l}\\t{%2, %0|%0, %2}
sar{l}\\t{%b2, %0|%0, %b2}"
sar{l}\\t{%2, %0|%0, %2}"
[(set_attr "type" "ishift")])
(define_expand "ashrhi3"
@ -5956,18 +5967,20 @@
sar{w}\\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")])
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
(define_insn "*ashrhi3_cmpno"
[(set (reg:CCNO 17)
(compare:CCNO
(ashiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0,0")
(match_operand:QI 2 "nonmemory_operand" "I,c"))
(ashiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I"))
(const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(ashiftrt:HI (match_dup 1) (match_dup 2)))]
"ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
"@
sar{w}\\t{%2, %0|%0, %2}
sar{w}\\t{%b2, %0|%0, %b2}"
sar{w}\\t{%2, %0|%0, %2}"
[(set_attr "type" "ishift")])
(define_expand "ashrqi3"
@ -5989,18 +6002,20 @@
sar{b}\\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")])
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
(define_insn "*ashrqi3_cmpno"
[(set (reg:CCNO 17)
(compare:CCNO
(ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
(match_operand:QI 2 "nonmemory_operand" "I,c"))
(ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I"))
(const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=rm,rm")
(set (match_operand:QI 0 "nonimmediate_operand" "=rm")
(ashiftrt:QI (match_dup 1) (match_dup 2)))]
"ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
"@
sar{b}\\t{%2, %0|%0, %2}
sar{b}\\t{%b2, %0|%0, %b2}"
sar{b}\\t{%2, %0|%0, %2}"
[(set_attr "type" "ishift")])
;; Logical shift instructions
@ -6079,18 +6094,20 @@
shr{l}\\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")])
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
(define_insn "*lshrsi3_cmpno"
[(set (reg:CCNO 17)
(compare:CCNO
(lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
(match_operand:QI 2 "nonmemory_operand" "I,c"))
(lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I"))
(const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(lshiftrt:SI (match_dup 1) (match_dup 2)))]
"ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
"@
shr{l}\\t{%2, %0|%0, %2}
shr{l}\\t{%b2, %0|%0, %b2}"
shr{l}\\t{%2, %0|%0, %2}"
[(set_attr "type" "ishift")])
(define_expand "lshrhi3"
@ -6112,18 +6129,20 @@
shr{w}\\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")])
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
(define_insn "*lshrhi3_cmpno"
[(set (reg:CCNO 17)
(compare:CCNO
(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0,0")
(match_operand:QI 2 "nonmemory_operand" "I,c"))
(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I"))
(const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(lshiftrt:HI (match_dup 1) (match_dup 2)))]
"ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
"@
shr{w}\\t{%2, %0|%0, %2}
shr{w}\\t{%b2, %0|%0, %b2}"
shr{w}\\t{%2, %0|%0, %2}"
[(set_attr "type" "ishift")])
(define_expand "lshrqi3"
@ -6145,18 +6164,20 @@
shr{b}\\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")])
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
(define_insn "*lshrqi2_cmpno"
[(set (reg:CCNO 17)
(compare:CCNO
(lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
(match_operand:QI 2 "nonmemory_operand" "I,c"))
(lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I"))
(const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=rm,rm")
(set (match_operand:QI 0 "nonimmediate_operand" "=rm")
(lshiftrt:QI (match_dup 1) (match_dup 2)))]
"ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
"@
shr{b}\\t{%2, %0|%0, %2}
shr{b}\\t{%b2, %0|%0, %b2}"
shr{b}\\t{%2, %0|%0, %2}"
[(set_attr "type" "ishift")])
;; Rotate instructions
@ -6180,20 +6201,6 @@
rol{l}\\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")])
(define_insn "*rotlsi3_cmpno"
[(set (reg:CCNO 17)
(compare:CCNO
(rotate:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
(match_operand:QI 2 "nonmemory_operand" "I,c"))
(const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
(rotate:SI (match_dup 1) (match_dup 2)))]
"ix86_binary_operator_ok (ROTATE, SImode, operands)"
"@
rol{l}\\t{%2, %0|%0, %2}
rol{l}\\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")])
(define_expand "rotlhi3"
[(set (match_operand:HI 0 "nonimmediate_operand" "")
(rotate:HI (match_operand:HI 1 "nonimmediate_operand" "")
@ -6213,20 +6220,6 @@
rol{w}\\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")])
(define_insn "*rotlhi3_cmpno"
[(set (reg:CCNO 17)
(compare:CCNO
(rotate:HI (match_operand:HI 1 "nonimmediate_operand" "0,0")
(match_operand:QI 2 "nonmemory_operand" "I,c"))
(const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
(rotate:HI (match_dup 1) (match_dup 2)))]
"ix86_binary_operator_ok (ROTATE, HImode, operands)"
"@
rol{w}\\t{%2, %0|%0, %2}
rol{w}\\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")])
(define_expand "rotlqi3"
[(set (match_operand:QI 0 "nonimmediate_operand" "")
(rotate:QI (match_operand:QI 1 "nonimmediate_operand" "")
@ -6246,20 +6239,6 @@
rol{b}\\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")])
(define_insn "*rotlqi3_cmpno"
[(set (reg:CCNO 17)
(compare:CCNO
(rotate:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
(match_operand:QI 2 "nonmemory_operand" "I,c"))
(const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=rm,rm")
(rotate:QI (match_dup 1) (match_dup 2)))]
"ix86_binary_operator_ok (ROTATE, QImode, operands)"
"@
rol{b}\\t{%2, %0|%0, %2}
rol{b}\\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")])
(define_expand "rotrsi3"
[(set (match_operand:SI 0 "nonimmediate_operand" "")
(rotatert:SI (match_operand:SI 1 "nonimmediate_operand" "")
@ -6279,20 +6258,6 @@
ror{l}\\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")])
(define_insn "*rotrsi3_cmpno"
[(set (reg:CCNO 17)
(compare:CCNO
(rotatert:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
(match_operand:QI 2 "nonmemory_operand" "I,c"))
(const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
(rotatert:SI (match_dup 1) (match_dup 2)))]
"ix86_binary_operator_ok (ROTATERT, SImode, operands)"
"@
ror{l}\\t{%2, %0|%0, %2}
ror{l}\\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")])
(define_expand "rotrhi3"
[(set (match_operand:HI 0 "nonimmediate_operand" "")
(rotatert:HI (match_operand:HI 1 "nonimmediate_operand" "")
@ -6312,20 +6277,6 @@
ror{w}\\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")])
(define_insn "*rotrhi3_cmpno"
[(set (reg:CCNO 17)
(compare:CCNO
(rotatert:HI (match_operand:HI 1 "nonimmediate_operand" "0,0")
(match_operand:QI 2 "nonmemory_operand" "I,c"))
(const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
(rotatert:HI (match_dup 1) (match_dup 2)))]
"ix86_binary_operator_ok (ROTATERT, HImode, operands)"
"@
ror{w}\\t{%2, %0|%0, %2}
ror{w}\\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")])
(define_expand "rotrqi3"
[(set (match_operand:QI 0 "nonimmediate_operand" "")
(rotatert:QI (match_operand:QI 1 "nonimmediate_operand" "")
@ -6344,20 +6295,6 @@
ror{b}\\t{%2, %0|%0, %2}
ror{b}\\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")])
(define_insn "*rotrqi3_cmpno"
[(set (reg:CCNO 17)
(compare:CCNO
(rotatert:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
(match_operand:QI 2 "nonmemory_operand" "I,c"))
(const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=rm,rm")
(rotatert:QI (match_dup 1) (match_dup 2)))]
"ix86_binary_operator_ok (ROTATERT, QImode, operands)"
"@
ror{b}\\t{%2, %0|%0, %2}
ror{b}\\t{%b2, %0|%0, %b2}"
[(set_attr "type" "ishift")])
;; Bit set / bit test instructions