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invoke.texi (IA-64 options): Add existing options that weren't already listed.

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* doc/invoke.texi (IA-64 options): Add existing options that
	weren't already listed.

From-SVN: r92162
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Steve Ellcey 2004-12-14 21:50:54 +00:00 • committed by Steve Ellcey
parent c31d515429
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gcc/ChangeLog
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@ -1,3 +1,8 @@
2004-12-14 Steve Ellcey <sje@cup.hp.com>
* doc/invoke.texi (IA-64 options): Add existing options that
weren't already listed.
2004-12-14 Jeff Law <law@redhat.com>
* tree-outof-ssa.c (coalesce_abnormal_edges): Pass the correct target

60
gcc/doc/invoke.texi
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@ -502,8 +502,11 @@ Objective-C and Objective-C++ Dialects}.
-mconstant-gp -mauto-pic -minline-float-divide-min-latency @gol
-minline-float-divide-max-throughput @gol
-minline-int-divide-min-latency @gol
-minline-int-divide-max-throughput -mno-dwarf2-asm @gol
-mfixed-range=@var{register-range}}
-minline-int-divide-max-throughput @gol
-minline-sqrt-min-latency -minline-sqrt-max-throughput @gol
-mno-dwarf2-asm -mearly-stop-bits @gol
-mfixed-range=@var{register-range} -mtls-size=@var{tls-size} @gol
-mtune=@var{cpu-type} -mt -pthread -milp32 -mlp64}
@emph{M32R/D Options}
@gccoptlist{-m32r2 -m32rx -m32r @gol
@ -8840,6 +8843,16 @@ using the minimum latency algorithm.
Generate code for inline divides of integer values
using the maximum throughput algorithm.
@item -minline-sqrt-min-latency
@opindex minline-sqrt-min-latency
Generate code for inline square roots
using the minimum latency algorithm.
@item -minline-sqrt-max-throughput
@opindex minline-sqrt-max-throughput
Generate code for inline square roots
using the maximum throughput algorithm.
@item -mno-dwarf2-asm
@itemx -mdwarf2-asm
@opindex mno-dwarf2-asm
@ -8847,6 +8860,14 @@ using the maximum throughput algorithm.
Don't (or do) generate assembler code for the DWARF2 line number debugging
info. This may be useful when not using the GNU assembler.
@item -mearly-stop-bits
@itemx -mno-early-stop-bits
@opindex mearly-stop-bits
@opindex mno-early-stop-bits
Allow stop bits to be placed earlier than immediately preceding the
instruction that triggered the stop bit. This can improve instruction
scheduling, but does not always do so.
@item -mfixed-range=@var{register-range}
@opindex mfixed-range
Generate code treating the given register range as fixed registers.
@ -8855,13 +8876,34 @@ useful when compiling kernel code. A register range is specified as
two registers separated by a dash. Multiple register ranges can be
specified separated by a comma.
@item -mearly-stop-bits
@itemx -mno-early-stop-bits
@opindex mearly-stop-bits
@opindex mno-early-stop-bits
Allow stop bits to be placed earlier than immediately preceding the
instruction that triggered the stop bit. This can improve instruction
scheduling, but does not always do so.
@item -mtls-size=@var{tls-size}
@opindex mtls-size
Specify bit size of immediate TLS offsets. Valid values are 14, 22, and
64.
@item -mtune-arch=@var{cpu-type}
@opindex mtune-arch
Tune the instruction scheduling for a particular CPU, Valid values are
itanium, itanium1, merced, itanium2, and mckinley.
@item -mt
@itemx -pthread
@opindex mt
@opindex pthread
Add support for multithreading using the POSIX threads library. This
option sets flags for both the preprocessor and linker. It does
not affect the thread safety of object code produced by the compiler or
that of libraries supplied with it. These are HP-UX specific flags.
@item -milp32
@itemx -mlp64
@opindex milp32
@opindex mlp64
Generate code for a 32-bit or 64-bit environment.
The 32-bit environment sets int, long and pointer to 32 bits.
The 64-bit environment sets int to 32 bits and long and pointer
to 64 bits. These are HP-UX specific flags.
@end table
@node M32R/D Options