rl78-protos.h (rl78_split_movsi): Accept a mode as well.
* config/rl78/rl78-protos.h (rl78_split_movsi): Accept a mode as well. * config/rl78/rl78-expand.md (movsf): New, same as movsi. * config/rl78/rl78.c (rl78_split_movsi): Accept a mode, use it instead of hardcoding SImode. From-SVN: r220951
This commit is contained in:
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d7823208f9
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4 changed files with 29 additions and 7 deletions
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@ -1,3 +1,11 @@
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2015-02-24 DJ Delorie <dj@redhat.com>
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* config/rl78/rl78-protos.h (rl78_split_movsi): Accept a mode as
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well.
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* config/rl78/rl78-expand.md (movsf): New, same as movsi.
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* config/rl78/rl78.c (rl78_split_movsi): Accept a mode, use it
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instead of hardcoding SImode.
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2015-02-24 Bernd Schmidt <bernds@codesourcery.com>
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2015-02-24 Bernd Schmidt <bernds@codesourcery.com>
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* omp-low.c (create_omp_child_function): Tag entrypoint
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* omp-low.c (create_omp_child_function): Tag entrypoint
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@ -87,7 +87,21 @@
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(match_operand:HI 4 "general_operand"))
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(match_operand:HI 4 "general_operand"))
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(set (match_operand:HI 3 "nonimmediate_operand")
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(set (match_operand:HI 3 "nonimmediate_operand")
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(match_operand:HI 5 "general_operand"))]
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(match_operand:HI 5 "general_operand"))]
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"rl78_split_movsi (operands);"
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"rl78_split_movsi (operands, SImode);"
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[(set_attr "valloc" "op1")]
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)
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(define_insn_and_split "movsf"
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[(set (match_operand:SF 0 "nonimmediate_operand" "=vYS,v,Wfr")
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(match_operand:SF 1 "general_operand" "viYS,Wfr,v"))]
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""
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"#"
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""
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[(set (match_operand:HI 2 "nonimmediate_operand")
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(match_operand:HI 4 "general_operand"))
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(set (match_operand:HI 3 "nonimmediate_operand")
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(match_operand:HI 5 "general_operand"))]
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"rl78_split_movsi (operands, SFmode);"
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[(set_attr "valloc" "op1")]
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[(set_attr "valloc" "op1")]
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)
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)
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@ -21,7 +21,7 @@
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void rl78_emit_eh_epilogue (rtx);
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void rl78_emit_eh_epilogue (rtx);
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void rl78_expand_compare (rtx *);
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void rl78_expand_compare (rtx *);
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void rl78_expand_movsi (rtx *);
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void rl78_expand_movsi (rtx *);
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void rl78_split_movsi (rtx *);
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void rl78_split_movsi (rtx *, enum machine_mode);
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int rl78_force_nonfar_2 (rtx *, rtx (*gen)(rtx,rtx));
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int rl78_force_nonfar_2 (rtx *, rtx (*gen)(rtx,rtx));
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int rl78_force_nonfar_3 (rtx *, rtx (*gen)(rtx,rtx,rtx));
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int rl78_force_nonfar_3 (rtx *, rtx (*gen)(rtx,rtx,rtx));
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void rl78_expand_eh_epilogue (rtx);
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void rl78_expand_eh_epilogue (rtx);
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@ -506,12 +506,12 @@ rl78_expand_movsi (rtx *operands)
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/* Generate code to move an SImode value. */
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/* Generate code to move an SImode value. */
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void
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void
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rl78_split_movsi (rtx *operands)
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rl78_split_movsi (rtx *operands, enum machine_mode omode)
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{
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{
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rtx op00, op02, op10, op12;
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rtx op00, op02, op10, op12;
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op00 = rl78_subreg (HImode, operands[0], SImode, 0);
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op00 = rl78_subreg (HImode, operands[0], omode, 0);
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op02 = rl78_subreg (HImode, operands[0], SImode, 2);
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op02 = rl78_subreg (HImode, operands[0], omode, 2);
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if (GET_CODE (operands[1]) == CONST
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if (GET_CODE (operands[1]) == CONST
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|| GET_CODE (operands[1]) == SYMBOL_REF)
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|| GET_CODE (operands[1]) == SYMBOL_REF)
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@ -523,8 +523,8 @@ rl78_split_movsi (rtx *operands)
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}
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}
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else
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else
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{
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{
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op10 = rl78_subreg (HImode, operands[1], SImode, 0);
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op10 = rl78_subreg (HImode, operands[1], omode, 0);
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op12 = rl78_subreg (HImode, operands[1], SImode, 2);
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op12 = rl78_subreg (HImode, operands[1], omode, 2);
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}
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}
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if (rtx_equal_p (operands[0], operands[1]))
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if (rtx_equal_p (operands[0], operands[1]))
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