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Set use_avx256_p if 256bit AVX register is used in vector move.

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gcc/

2010-11-03  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/46295
	* config/i386/i386.c (ix86_expand_vector_move): Set use_avx256_p
	if 256bit AVX register is used.

gcc/testsuite/

2010-11-03  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/46295
	* gcc.target/i386/pr46295.c: New.

From-SVN: r166277
This commit is contained in:
H.J. Lu 2010-11-03 21:16:36 +00:00 • committed by H.J. Lu
parent 576e00858c
commit 27835a8a5c
4 changed files with 29 additions and 0 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2010-11-03 H.J. Lu <hongjiu.lu@intel.com>
PR target/46295
* config/i386/i386.c (ix86_expand_vector_move): Set use_avx256_p
if 256bit AVX register is used.
2010-11-03 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_emit_minmax): Add support to use

3
gcc/config/i386/i386.c
View file

@ -15144,6 +15144,9 @@ ix86_expand_vector_move (enum machine_mode mode, rtx operands[])
rtx op0 = operands[0], op1 = operands[1];
unsigned int align = GET_MODE_ALIGNMENT (mode);
if (use_avx256_p (mode, NULL_TREE))
cfun->machine->use_avx256_p = true;
/* Force constants other than zero into memory. We do not know how
the instructions used to build constants modify the upper 64 bits
of the register, once we have that information we may be able

5
gcc/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2010-11-03 H.J. Lu <hongjiu.lu@intel.com>
PR target/46295
* gcc.target/i386/pr46295.c: New.
2010-11-03 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/vsx-sfminmax.c: New test for using double

15
gcc/testsuite/gcc.target/i386/pr46295.c Normal file
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@ -0,0 +1,15 @@
/* { dg-do compile } */
/* { dg-options "-O3 -mavx -mtune=generic -dp" } */
typedef double EXPRESS[5];
void Parse_Rel_Factor (EXPRESS Express,int *Terms);
void Parse_Vector ()
{
EXPRESS Express;
int Terms;
for (Terms = 0; Terms < 5; Terms++)
Express[Terms] = 0.0;
Parse_Rel_Factor(Express,&Terms);
}
/* { dg-final { scan-assembler-times "avx_vzeroupper" 1 } } */