i386-protos.h (ix86_split_long_move): Return void.
* i386-protos.h (ix86_split_long_move): Return void. * i386.c (ix86_split_to_parts): Handle 64bit target. (ix86_split_long_move): Likewise. * i386.md (all calls to ix86_split_long_move): Update. From-SVN: r40816
This commit is contained in:
parent
ddce8041e2
commit
26e5b205a7
4 changed files with 160 additions and 70 deletions
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@ -1,3 +1,10 @@
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Sat Mar 24 21:13:28 CET 2001 Jan Hubicka <jh@suse.cz>
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* i386-protos.h (ix86_split_long_move): Return void.
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* i386.c (ix86_split_to_parts): Handle 64bit target.
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(ix86_split_long_move): Likewise.
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* i386.md (all calls to ix86_split_long_move): Update.
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2001-03-23 Richard Henderson <rth@redhat.com>
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* config/mips/iris4.h (ASM_OUTPUT_ASCII): Rename local variables
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@ -115,7 +115,7 @@ extern void ix86_expand_branch PARAMS ((enum rtx_code, rtx));
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extern int ix86_expand_setcc PARAMS ((enum rtx_code, rtx));
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extern int ix86_expand_int_movcc PARAMS ((rtx[]));
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extern int ix86_expand_fp_movcc PARAMS ((rtx[]));
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extern int ix86_split_long_move PARAMS ((rtx[]));
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extern void ix86_split_long_move PARAMS ((rtx[]));
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extern void ix86_split_ashldi PARAMS ((rtx *, rtx));
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extern void ix86_split_ashrdi PARAMS ((rtx *, rtx));
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extern void ix86_split_lshrdi PARAMS ((rtx *, rtx));
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@ -6599,7 +6599,12 @@ ix86_split_to_parts (operand, parts, mode)
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rtx *parts;
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enum machine_mode mode;
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{
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int size = mode == TFmode ? 3 : GET_MODE_SIZE (mode) / 4;
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int size;
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if (!TARGET_64BIT)
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size = mode == TFmode ? 3 : (GET_MODE_SIZE (mode) / 4);
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else
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size = (GET_MODE_SIZE (mode) + 4) / 8;
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if (GET_CODE (operand) == REG && MMX_REGNO_P (REGNO (operand)))
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abort ();
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@ -6620,10 +6625,11 @@ ix86_split_to_parts (operand, parts, mode)
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if (! push_operand (operand, VOIDmode))
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abort ();
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PUT_MODE (operand, SImode);
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operand = copy_rtx (operand);
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PUT_MODE (operand, Pmode);
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parts[0] = parts[1] = parts[2] = operand;
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}
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else
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else if (!TARGET_64BIT)
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{
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if (mode == DImode)
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split_di (&operand, 1, &parts[0], &parts[1]);
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@ -6640,7 +6646,7 @@ ix86_split_to_parts (operand, parts, mode)
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}
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else if (offsettable_memref_p (operand))
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{
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PUT_MODE (operand, SImode);
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operand = change_address (operand, SImode, XEXP (operand, 0));
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parts[0] = operand;
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parts[1] = adj_offsettable_operand (operand, 4);
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if (size == 3)
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@ -6672,6 +6678,42 @@ ix86_split_to_parts (operand, parts, mode)
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abort ();
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}
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}
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else
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{
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if (mode == XFmode || mode == TFmode)
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{
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if (REG_P (operand))
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{
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if (!reload_completed)
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abort ();
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parts[0] = gen_rtx_REG (DImode, REGNO (operand) + 0);
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parts[1] = gen_rtx_REG (SImode, REGNO (operand) + 1);
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}
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else if (offsettable_memref_p (operand))
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{
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operand = change_address (operand, DImode, XEXP (operand, 0));
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parts[0] = operand;
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parts[1] = adj_offsettable_operand (operand, 8);
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parts[1] = change_address (parts[1], SImode, XEXP (operand, 0));
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}
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else if (GET_CODE (operand) == CONST_DOUBLE)
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{
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REAL_VALUE_TYPE r;
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long l[3];
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REAL_VALUE_FROM_CONST_DOUBLE (r, operand);
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REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, l);
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/* Do not use shift by 32 to avoid warning on 32bit systems. */
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if (HOST_BITS_PER_WIDE_INT >= 64)
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parts[0] = GEN_INT (l[0] + ((l[1] << 31) << 1));
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else
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parts[0] = immed_double_const (l[0], l[1], DImode);
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parts[1] = GEN_INT (l[2]);
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}
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else
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abort ();
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}
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}
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return size;
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}
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@ -6681,19 +6723,36 @@ ix86_split_to_parts (operand, parts, mode)
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insns have been emitted. Operands 2-4 contain the input values
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int the correct order; operands 5-7 contain the output values. */
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int
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ix86_split_long_move (operands1)
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rtx operands1[];
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void
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ix86_split_long_move (operands)
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rtx operands[];
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{
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rtx part[2][3];
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rtx operands[2];
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int size;
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int nparts;
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int push = 0;
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int collisions = 0;
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enum machine_mode mode = GET_MODE (operands[0]);
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/* Make our own copy to avoid clobbering the operands. */
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operands[0] = copy_rtx (operands1[0]);
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operands[1] = copy_rtx (operands1[1]);
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/* The DFmode expanders may ask us to move double.
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For 64bit target this is single move. By hiding the fact
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here we simplify i386.md splitters. */
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if (GET_MODE_SIZE (GET_MODE (operands[0])) == 8 && TARGET_64BIT)
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{
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/* Optimize constant pool reference to immediates. This is used by fp moves,
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that force all constants to memory to allow combining. */
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if (GET_CODE (operands[1]) == MEM
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&& GET_CODE (XEXP (operands[1], 0)) == SYMBOL_REF
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&& CONSTANT_POOL_ADDRESS_P (XEXP (operands[1], 0)))
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operands[1] = get_pool_constant (XEXP (operands[1], 0));
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if (push_operand (operands[0], VOIDmode))
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operands[0] = change_address (operands[0], DImode, XEXP (operands[0], 0));
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else
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operands[0] = gen_lowpart (DImode, operands[0]);
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operands[1] = gen_lowpart (DImode, operands[1]);
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emit_move_insn (operands[0], operands[1]);
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return;
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}
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/* The only non-offsettable memory we handle is push. */
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if (push_operand (operands[0], VOIDmode))
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&& ! offsettable_memref_p (operands[0]))
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abort ();
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size = ix86_split_to_parts (operands[0], part[0], GET_MODE (operands1[0]));
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ix86_split_to_parts (operands[1], part[1], GET_MODE (operands1[0]));
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nparts = ix86_split_to_parts (operands[1], part[1], GET_MODE (operands[0]));
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ix86_split_to_parts (operands[0], part[0], GET_MODE (operands[0]));
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/* When emitting push, take care for source operands on the stack. */
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if (push && GET_CODE (operands[1]) == MEM
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&& reg_overlap_mentioned_p (stack_pointer_rtx, operands[1]))
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{
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if (size == 3)
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if (nparts == 3)
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part[1][1] = part[1][2];
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part[1][0] = part[1][1];
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}
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collisions++;
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if (reg_overlap_mentioned_p (part[0][1], XEXP (part[1][0], 0)))
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collisions++;
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if (size == 3
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if (nparts == 3
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&& reg_overlap_mentioned_p (part[0][2], XEXP (part[1][0], 0)))
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collisions++;
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/* Collision in the middle part can be handled by reordering. */
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if (collisions == 1 && size == 3
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if (collisions == 1 && nparts == 3
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&& reg_overlap_mentioned_p (part[0][1], XEXP (part[1][0], 0)))
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{
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rtx tmp;
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else if (collisions > 1)
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{
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collisions = 1;
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emit_insn (gen_rtx_SET (VOIDmode, part[0][size - 1],
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emit_insn (gen_rtx_SET (VOIDmode, part[0][nparts - 1],
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XEXP (part[1][0], 0)));
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part[1][0] = change_address (part[1][0], SImode, part[0][size - 1]);
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part[1][1] = adj_offsettable_operand (part[1][0], 4);
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if (size == 3)
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part[1][0] = change_address (part[1][0],
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TARGET_64BIT ? DImode : SImode,
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part[0][nparts - 1]);
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part[1][1] = adj_offsettable_operand (part[1][0],
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UNITS_PER_WORD);
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part[1][1] = change_address (part[1][1], GET_MODE (part[0][1]),
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XEXP (part[1][1], 0));
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if (nparts == 3)
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part[1][2] = adj_offsettable_operand (part[1][0], 8);
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}
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}
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if (push)
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{
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if (size == 3)
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if (!TARGET_64BIT)
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{
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/* We use only first 12 bytes of TFmode value, but for pushing we
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are required to adjust stack as if we were pushing real 16byte
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value. */
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if (GET_MODE (operands1[0]) == TFmode)
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emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx,
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GEN_INT (-4)));
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emit_insn (gen_push (part[1][2]));
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if (nparts == 3)
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{
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/* We use only first 12 bytes of TFmode value, but for pushing we
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are required to adjust stack as if we were pushing real 16byte
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value. */
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if (mode == TFmode && !TARGET_64BIT)
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emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx,
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GEN_INT (-4)));
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emit_move_insn (part[0][2], part[1][2]);
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}
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}
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emit_insn (gen_push (part[1][1]));
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emit_insn (gen_push (part[1][0]));
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return 1;
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else
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{
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/* In 64bit mode we don't have 32bit push available. In case this is
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register, it is OK - we will just use larger counterpart. We also
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retype memory - these comes from attempt to avoid REX prefix on
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moving of second half of TFmode value. */
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if (GET_MODE (part[1][1]) == SImode)
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{
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if (GET_CODE (part[1][1]) == MEM)
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part[1][1] = change_address (part[1][1], DImode, XEXP (part[1][1], 0));
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else if (REG_P (part[1][1]))
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part[1][1] = gen_rtx_REG (DImode, REGNO (part[1][1]));
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else
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abort();
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}
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}
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emit_move_insn (part[0][1], part[1][1]);
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emit_move_insn (part[0][0], part[1][0]);
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return;
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}
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/* Choose correct order to not overwrite the source before it is copied. */
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if ((REG_P (part[0][0])
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&& REG_P (part[1][1])
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&& (REGNO (part[0][0]) == REGNO (part[1][1])
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|| (size == 3
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|| (nparts == 3
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&& REGNO (part[0][0]) == REGNO (part[1][2]))))
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|| (collisions > 0
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&& reg_overlap_mentioned_p (part[0][0], XEXP (part[1][0], 0))))
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{
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if (size == 3)
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if (nparts == 3)
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{
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operands1[2] = part[0][2];
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operands1[3] = part[0][1];
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operands1[4] = part[0][0];
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operands1[5] = part[1][2];
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operands1[6] = part[1][1];
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operands1[7] = part[1][0];
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operands[2] = part[0][2];
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operands[3] = part[0][1];
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operands[4] = part[0][0];
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operands[5] = part[1][2];
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operands[6] = part[1][1];
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operands[7] = part[1][0];
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}
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else
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{
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operands1[2] = part[0][1];
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operands1[3] = part[0][0];
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operands1[5] = part[1][1];
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operands1[6] = part[1][0];
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operands[2] = part[0][1];
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operands[3] = part[0][0];
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operands[5] = part[1][1];
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operands[6] = part[1][0];
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}
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}
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else
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{
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if (size == 3)
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if (nparts == 3)
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{
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operands1[2] = part[0][0];
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operands1[3] = part[0][1];
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operands1[4] = part[0][2];
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operands1[5] = part[1][0];
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operands1[6] = part[1][1];
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operands1[7] = part[1][2];
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operands[2] = part[0][0];
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operands[3] = part[0][1];
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operands[4] = part[0][2];
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operands[5] = part[1][0];
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operands[6] = part[1][1];
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operands[7] = part[1][2];
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}
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else
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{
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operands1[2] = part[0][0];
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operands1[3] = part[0][1];
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operands1[5] = part[1][0];
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operands1[6] = part[1][1];
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operands[2] = part[0][0];
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operands[3] = part[0][1];
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operands[5] = part[1][0];
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operands[6] = part[1][1];
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}
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}
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emit_move_insn (operands[2], operands[5]);
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emit_move_insn (operands[3], operands[6]);
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if (nparts == 3)
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emit_move_insn (operands[4], operands[7]);
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return 0;
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return;
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}
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void
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@ -2421,7 +2421,7 @@
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(match_operand:DI 1 "general_operand" ""))]
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"!TARGET_64BIT && reload_completed && ! MMX_REG_P (operands[1])"
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[(const_int 0)]
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"if (!ix86_split_long_move (operands)) abort (); DONE;")
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"ix86_split_long_move (operands); DONE;")
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;; %%% This multiword shite has got to go.
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(define_split
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@ -2429,9 +2429,8 @@
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(match_operand:DI 1 "general_operand" ""))]
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"!TARGET_64BIT && reload_completed && ! MMX_REG_P (operands[0])
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&& ! MMX_REG_P (operands[1])"
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[(set (match_dup 2) (match_dup 5))
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(set (match_dup 3) (match_dup 6))]
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"if (ix86_split_long_move (operands)) DONE;")
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[(const_int 0)]
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"ix86_split_long_move (operands); DONE;")
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(define_insn "*movdi_1_rex64"
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[(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r,mr,!mr,!m*y,!*y,*m,*Y")
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@ -2823,7 +2822,7 @@
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(match_operand:DF 1 "general_operand" ""))]
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"reload_completed"
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[(const_int 0)]
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"if (!ix86_split_long_move (operands)) abort (); DONE;")
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"ix86_split_long_move (operands); DONE;")
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;; Moving is usually shorter when only FP registers are used. This separate
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;; movdf pattern avoids the use of integer registers for FP operations
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@ -2957,9 +2956,8 @@
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&& ! (ANY_FP_REG_P (operands[1]) ||
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(GET_CODE (operands[1]) == SUBREG
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&& ANY_FP_REG_P (SUBREG_REG (operands[1]))))"
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[(set (match_dup 2) (match_dup 5))
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(set (match_dup 3) (match_dup 6))]
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"if (ix86_split_long_move (operands)) DONE;")
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[(const_int 0)]
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"ix86_split_long_move (operands); DONE;")
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(define_insn "*swapdf"
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[(set (match_operand:DF 0 "register_operand" "+f")
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@ -3125,7 +3123,7 @@
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|| GET_MODE (operands[0]) == DFmode)
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&& (!REG_P (operands[1]) || !ANY_FP_REGNO_P (REGNO (operands[1])))"
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[(const_int 0)]
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"if (!ix86_split_long_move (operands)) abort (); DONE;")
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"ix86_split_long_move (operands); DONE;")
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(define_split
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[(set (match_operand:XF 0 "push_operand" "")
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@ -3351,10 +3349,8 @@
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&& ! (ANY_FP_REG_P (operands[1]) ||
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(GET_CODE (operands[1]) == SUBREG
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&& ANY_FP_REG_P (SUBREG_REG (operands[1]))))"
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[(set (match_dup 2) (match_dup 5))
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(set (match_dup 3) (match_dup 6))
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(set (match_dup 4) (match_dup 7))]
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"if (ix86_split_long_move (operands)) DONE;")
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[(const_int 0)]
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"ix86_split_long_move (operands); DONE;")
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(define_split
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[(set (match_operand 0 "register_operand" "")
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Loading…
Add table
Reference in a new issue