invoke.texi (-mreg-alloc): Nuke.
* invoke.texi (-mreg-alloc): Nuke. * i386.c (ix86_reg_alloc_order, regs_allocated, order_regs_for_local_alloc): Nuke. (override_options): Kill reg_alloc code. * i386.h (TARGET_OPTIONS): Kill reg-alloc. (REG_ALLOC_ORDER): SSE goes before I387. (ORDER_REGS_FOR_LOCAL_ALLOC): Kill. (ix86_reg_alloc_order): Likewise. * i386-protos.h (ix86_reg_alloc_order): Kill. From-SVN: r39697
This commit is contained in:
Jan Hubicka
Jan Hubicka
parent
121bc96b8a
commit
266da7a291
5 changed files with 17 additions and 122 deletions
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@ -1,3 +1,15 @@
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Wed Feb 14 12:37:37 CET 2001 Jan Hubicka <jh@suse.cz>
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* invoke.texi (-mreg-alloc): Nuke.
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* i386.c (ix86_reg_alloc_order, regs_allocated,
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order_regs_for_local_alloc): Nuke.
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(override_options): Kill reg_alloc code.
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* i386.h (TARGET_OPTIONS): Kill reg-alloc.
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(REG_ALLOC_ORDER): SSE goes before I387.
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(ORDER_REGS_FOR_LOCAL_ALLOC): Kill.
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(ix86_reg_alloc_order): Likewise.
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* i386-protos.h (ix86_reg_alloc_order): Kill.
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2001-02-14 Richard Henderson <rth@redhat.com>
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* toplev.c (f_options): Clarify -fschedule-insns2 documentation.
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@ -21,7 +21,6 @@ Boston, MA 02111-1307, USA. */
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/* Functions in i386.c */
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extern void override_options PARAMS ((void));
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extern void order_regs_for_local_alloc PARAMS ((void));
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extern void optimization_options PARAMS ((int, int));
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extern int ix86_can_use_return_insn_p PARAMS ((void));
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@ -412,10 +412,6 @@ int ix86_arch;
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const char *ix86_cpu_string; /* for -mcpu=<xxx> */
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const char *ix86_arch_string; /* for -march=<xxx> */
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/* Register allocation order */
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const char *ix86_reg_alloc_order;
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static char regs_allocated[FIRST_PSEUDO_REGISTER];
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/* # of registers to use to pass arguments. */
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const char *ix86_regparm_string;
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@ -611,39 +607,6 @@ override_options ()
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mark_machine_status = ix86_mark_machine_status;
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free_machine_status = ix86_free_machine_status;
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/* Validate registers in register allocation order. */
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if (ix86_reg_alloc_order)
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{
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int ch;
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for (i = 0; (ch = ix86_reg_alloc_order[i]) != '\0'; i++)
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{
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int regno = -1;
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switch (ch)
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{
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case 'a': regno = 0; break;
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case 'd': regno = 1; break;
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case 'c': regno = 2; break;
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case 'b': regno = 3; break;
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case 'S': regno = 4; break;
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case 'D': regno = 5; break;
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case 'B': regno = 6; break;
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default: error ("Register '%c' is unknown", ch);
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}
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if (regno >= 0)
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{
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if (regs_allocated[regno])
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error ("Register '%c' already specified in allocation order",
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ch);
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regs_allocated[regno] = 1;
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}
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}
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}
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/* Validate -mregparm= value. */
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if (ix86_regparm_string)
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{
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@ -726,61 +689,6 @@ override_options ()
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target_flags |= MASK_MMX;
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}
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/* A C statement (sans semicolon) to choose the order in which to
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allocate hard registers for pseudo-registers local to a basic
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block.
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Store the desired register order in the array `reg_alloc_order'.
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Element 0 should be the register to allocate first; element 1, the
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next register; and so on.
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The macro body should not assume anything about the contents of
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`reg_alloc_order' before execution of the macro.
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On most machines, it is not necessary to define this macro. */
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void
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order_regs_for_local_alloc ()
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{
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int i, ch, order;
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/* User specified the register allocation order. */
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if (ix86_reg_alloc_order)
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{
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for (i = order = 0; (ch = ix86_reg_alloc_order[i]) != '\0'; i++)
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{
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int regno = 0;
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switch (ch)
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{
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case 'a': regno = 0; break;
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case 'd': regno = 1; break;
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case 'c': regno = 2; break;
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case 'b': regno = 3; break;
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case 'S': regno = 4; break;
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case 'D': regno = 5; break;
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case 'B': regno = 6; break;
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}
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reg_alloc_order[order++] = regno;
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}
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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{
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if (! regs_allocated[i])
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reg_alloc_order[order++] = i;
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}
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}
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/* If user did not specify a register allocation order, use natural order. */
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else
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{
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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reg_alloc_order[i] = i;
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}
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}
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void
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optimization_options (level, size)
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int level;
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@ -366,8 +366,6 @@ extern int ix86_arch;
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N_("Schedule code for given CPU")}, \
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{ "arch=", &ix86_arch_string, \
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N_("Generate code for given CPU")}, \
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{ "reg-alloc=", &ix86_reg_alloc_order, \
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N_("Control allocation order of integer registers") }, \
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{ "regparm=", &ix86_regparm_string, \
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N_("Number of registers used to pass integer arguments") }, \
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{ "align-loops=", &ix86_align_loops_string, \
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@ -717,30 +715,17 @@ extern int ix86_arch;
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generated by allocating edx first, so restore the 'natural' order of things. */
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#define REG_ALLOC_ORDER \
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/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/ \
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{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, \
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/*ax,dx,cx,bx,si,di,bp,sp*/ \
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{ 0, 1, 2, 3, 4, 5, 6, 7, \
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/*,arg,cc,fpsr,dir,frame*/ \
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16,17, 18, 19, 20, \
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/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/ \
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21, 22, 23, 24, 25, 26, 27, 28, \
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/*st,st1,st2,st3,st4,st5,st6,st7*/ \
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8, 9, 10, 11, 12, 13, 14, 15, \
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/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/ \
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29, 30, 31, 32, 33, 34, 35, 36 }
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/* A C statement (sans semicolon) to choose the order in which to
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allocate hard registers for pseudo-registers local to a basic
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block.
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Store the desired register order in the array `reg_alloc_order'.
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Element 0 should be the register to allocate first; element 1, the
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next register; and so on.
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The macro body should not assume anything about the contents of
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`reg_alloc_order' before execution of the macro.
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On most machines, it is not necessary to define this macro. */
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#define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
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/* Macro to conditionally modify fixed_regs/call_used_regs. */
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#define CONDITIONAL_REGISTER_USAGE \
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{ \
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@ -2897,7 +2882,6 @@ do { long l; \
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/* Variables in i386.c */
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extern const char *ix86_cpu_string; /* for -mcpu=<xxx> */
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extern const char *ix86_arch_string; /* for -march=<xxx> */
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extern const char *ix86_reg_alloc_order; /* register allocation order */
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extern const char *ix86_regparm_string; /* # registers to use to pass args */
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extern const char *ix86_align_loops_string; /* power of two alignment for loops */
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extern const char *ix86_align_jumps_string; /* power of two alignment for non-loop jumps */
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@ -457,12 +457,11 @@ in the following sections.
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-mintel-syntax -mieee-fp -mno-fancy-math-387 @gol
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-mno-fp-ret-in-387 -msoft-float -msvr3-shlib @gol
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-mno-wide-multiply -mrtd -malign-double @gol
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-mreg-alloc=@var{list} -mregparm=@var{num} @gol
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-malign-jumps=@var{num} -malign-loops=@var{num} @gol
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-malign-functions=@var{num} -mpreferred-stack-boundary=@var{num} @gol
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-mthreads -mno-align-stringops -minline-all-stringops @gol
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-mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol
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-m96bit-long-double}
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-m96bit-long-double} -mregparm=@var{num} @gol
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@emph{HPPA Options}
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@gccoptlist{
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@ -6646,13 +6645,6 @@ In addition, seriously incorrect code will result if you call a
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function with too many arguments. (Normally, extra arguments are
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harmlessly ignored.)
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@item -mreg-alloc=@var{regs}
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Control the default allocation order of integer registers. The
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string @var{regs} is a series of letters specifying a register. The
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supported letters are: @code{a} allocate EAX; @code{b} allocate EBX;
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@code{c} allocate ECX; @code{d} allocate EDX; @code{S} allocate ESI;
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@code{D} allocate EDI; @code{B} allocate EBP.
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@item -mregparm=@var{num}
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Control how many registers are used to pass integer arguments. By
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default, no registers are used to pass arguments, and at most 3
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