From 250dce25b6ca7ce63f036fc4a90b4d1e8c6517e9 Mon Sep 17 00:00:00 2001
From: Patrick O'Neill <patrick@rivosinc.com>
Date: Wed, 4 Oct 2023 15:50:55 -0700
Subject: [PATCH] RISC-V: Test memcpy inlined on riscv_v

Since r14-4358-g9464e72bcc9 riscv_v targets use vector instructions to
perform a memcpy. We no longer expect memcpy for riscv_v targets.

gcc/testsuite/ChangeLog:

	* gcc.dg/pr90263.c: Skip riscv_v targets.
	* gcc.target/riscv/rvv/base/pr90263.c: New test.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
Co-authored-by: Joern Rennecke <joern.rennecke@embecosm.com>
---
 gcc/testsuite/gcc.dg/pr90263.c                    | 1 +
 gcc/testsuite/gcc.target/riscv/rvv/base/pr90263.c | 7 +++++++
 2 files changed, 8 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr90263.c

diff --git a/gcc/testsuite/gcc.dg/pr90263.c b/gcc/testsuite/gcc.dg/pr90263.c
index 3222a5331c1..831e098783b 100644
--- a/gcc/testsuite/gcc.dg/pr90263.c
+++ b/gcc/testsuite/gcc.dg/pr90263.c
@@ -2,6 +2,7 @@
 /* { dg-do compile } */
 /* { dg-options "-O2" } */
 /* { dg-require-effective-target glibc } */
+/* { dg-skip-if "riscv_v uses an inline memcpy routine" { riscv_v } }*/
 
 int *f (int *p, int *q, long n)
 {
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr90263.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr90263.c
new file mode 100644
index 00000000000..7308428e2c3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr90263.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-require-effective-target glibc } */
+
+#include "../../../../gcc.dg/pr90263.c"
+
+/* { dg-final { scan-assembler-not "memcpy" { target { riscv_v } } } } */