arc.c (write_ext_corereg_1): Delete.
gcc/ * config/arc/arc.c (write_ext_corereg_1): Delete. (arc_write_ext_corereg): Use FOR_EACH_SUBRTX. From-SVN: r217019
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2 changed files with 23 additions and 22 deletions
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@ -1,3 +1,8 @@
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2014-11-02 Richard Sandiford <richard.sandiford@arm.com>
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* config/arc/arc.c (write_ext_corereg_1): Delete.
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(arc_write_ext_corereg): Use FOR_EACH_SUBRTX.
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2014-11-02 Richard Sandiford <richard.sandiford@arm.com>
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* config/arc/arc.c (arc600_corereg_hazard_1): Delete.
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@ -8441,34 +8441,30 @@ arc_predicate_delay_insns (void)
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be hoisted out into a delay slot, a basic block can also be emptied this
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way, and branch and/or fall through targets be redirected. Hence we don't
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want such writes in a delay slot. */
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/* Called by arc_write_ext_corereg via for_each_rtx. */
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static int
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write_ext_corereg_1 (rtx *xp, void *data ATTRIBUTE_UNUSED)
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{
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rtx x = *xp;
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rtx dest;
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switch (GET_CODE (x))
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{
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case SET: case POST_INC: case POST_DEC: case PRE_INC: case PRE_DEC:
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break;
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default:
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/* This is also fine for PRE/POST_MODIFY, because they contain a SET. */
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return 0;
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}
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dest = XEXP (x, 0);
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if (REG_P (dest) && REGNO (dest) >= 32 && REGNO (dest) < 61)
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return 1;
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return 0;
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}
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/* Return nonzreo iff INSN writes to an extension core register. */
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int
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arc_write_ext_corereg (rtx insn)
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{
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return for_each_rtx (&PATTERN (insn), write_ext_corereg_1, 0);
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subrtx_iterator::array_type array;
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FOR_EACH_SUBRTX (iter, array, PATTERN (insn), NONCONST)
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{
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const_rtx x = *iter;
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switch (GET_CODE (x))
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{
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case SET: case POST_INC: case POST_DEC: case PRE_INC: case PRE_DEC:
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break;
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default:
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/* This is also fine for PRE/POST_MODIFY, because they
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contain a SET. */
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continue;
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}
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const_rtx dest = XEXP (x, 0);
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if (REG_P (dest) && REGNO (dest) >= 32 && REGNO (dest) < 61)
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return 1;
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}
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return 0;
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}
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/* This is like the hook, but returns NULL when it can't / won't generate
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