diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 84153b09dbb..21b8aa33156 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2013-12-02 Bernd Edlinger + + Fix C++0x memory model for unaligned fields in packed, aligned(4) + structures with -fno-strict-volatile-bitfields on STRICT_ALIGNMENT + targets like arm-none-eabi. + * expr.c (expand_assignment): Handle normal fields like bit regions. + 2013-12-02 Bernd Edlinger PR target/58115 diff --git a/gcc/expr.c b/gcc/expr.c index aeff2ca58f4..c0539da250c 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -4824,6 +4824,17 @@ expand_assignment (tree to, tree from, bool nontemporal) if (TREE_CODE (to) == COMPONENT_REF && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1))) get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset); + /* The C++ memory model naturally applies to byte-aligned fields. + However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or + BITSIZE are not byte-aligned, there is no need to limit the range + we can access. This can occur with packed structures in Ada. */ + else if (bitsize > 0 + && bitsize % BITS_PER_UNIT == 0 + && bitpos % BITS_PER_UNIT == 0) + { + bitregion_start = bitpos; + bitregion_end = bitpos + bitsize - 1; + } to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 9c7be13551c..f92967a671c 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2013-12-02 Bernd Edlinger + + * gcc.dg/pr56997-4.c: New testcase. + 2013-12-02 Marek Polacek * c-c++-common/ubsan/vla-1.c: Split the tests into individual diff --git a/gcc/testsuite/gcc.dg/pr56997-4.c b/gcc/testsuite/gcc.dg/pr56997-4.c new file mode 100644 index 00000000000..38f6248d2ed --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr56997-4.c @@ -0,0 +1,23 @@ +/* Test volatile access to unaligned field. */ +/* { dg-do compile } */ +/* { dg-options "-fno-strict-volatile-bitfields -fdump-rtl-final" } */ + +#define test_type unsigned short + +typedef struct s{ + unsigned char Prefix[1]; + volatile test_type Type; +}__attribute((__packed__,__aligned__(4))) ss; + +extern volatile ss v; + +void +foo (test_type u) +{ + v.Type = u; +} + +/* The C++ memory model forbids data store race conditions outside the + unaligned data member, therefore only QI or HI access is allowed, no SI. */ +/* { dg-final { scan-rtl-dump-not "mem/v(/.)*:SI" "final" } } */ +/* { dg-final { cleanup-rtl-dump "final" } } */