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Use enum for sched_autopref tune settings

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* config/arm/arm-protos.h (enum arm_sched_autopref): New constants.
	(struct tune_params): Use the enum.
	* arm.c (arm_*_tune): Update.
	(arm_option_override): Update.

From-SVN: r219893
This commit is contained in:
Maxim Kuvyrkov 2015-01-20 13:37:02 +00:00 • committed by Maxim Kuvyrkov
parent 2fd2ae3458
commit 237c70c352
3 changed files with 45 additions and 22 deletions
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7
gcc/ChangeLog
View file

@ -1,3 +1,10 @@
2015-01-20 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
* config/arm/arm-protos.h (enum arm_sched_autopref): New constants.
(struct tune_params): Use the enum.
* arm.c (arm_*_tune): Update.
(arm_option_override): Update.
2015-01-20 Richard Biener <rguenther@suse.de>
PR ipa/64684

9
gcc/config/arm/arm-protos.h
View file

@ -257,6 +257,13 @@ struct cpu_vec_costs {
struct cpu_cost_table;
enum arm_sched_autopref
{
ARM_SCHED_AUTOPREF_OFF,
ARM_SCHED_AUTOPREF_RANK,
ARM_SCHED_AUTOPREF_FULL
};
struct tune_params
{
bool (*rtx_costs) (rtx, RTX_CODE, RTX_CODE, int *, bool);
@ -292,7 +299,7 @@ struct tune_params
/* Bitfield encoding the fuseable pairs of instructions. */
unsigned int fuseable_ops;
/* Depth of scheduling queue to check for L2 autoprefetcher. */
int sched_autopref_queue_depth;
enum arm_sched_autopref sched_autopref;
};
extern const struct tune_params *current_tune;

51
gcc/config/arm/arm.c
View file

@ -1696,7 +1696,7 @@ const struct tune_params arm_slowmul_tune =
false, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_NOTHING, /* Fuseable pairs of instructions. */
-1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_OFF /* Sched L2 autopref. */
};
const struct tune_params arm_fastmul_tune =
@ -1717,7 +1717,7 @@ const struct tune_params arm_fastmul_tune =
false, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_NOTHING, /* Fuseable pairs of instructions. */
-1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_OFF /* Sched L2 autopref. */
};
/* StrongARM has early execution of branches, so a sequence that is worth
@ -1741,7 +1741,7 @@ const struct tune_params arm_strongarm_tune =
false, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_NOTHING, /* Fuseable pairs of instructions. */
-1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_OFF /* Sched L2 autopref. */
};
const struct tune_params arm_xscale_tune =
@ -1762,7 +1762,7 @@ const struct tune_params arm_xscale_tune =
false, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_NOTHING, /* Fuseable pairs of instructions. */
-1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_OFF /* Sched L2 autopref. */
};
const struct tune_params arm_9e_tune =
@ -1783,7 +1783,7 @@ const struct tune_params arm_9e_tune =
false, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_NOTHING, /* Fuseable pairs of instructions. */
-1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_OFF /* Sched L2 autopref. */
};
const struct tune_params arm_v6t2_tune =
@ -1804,7 +1804,7 @@ const struct tune_params arm_v6t2_tune =
false, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_NOTHING, /* Fuseable pairs of instructions. */
-1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_OFF /* Sched L2 autopref. */
};
/* Generic Cortex tuning. Use more specific tunings if appropriate. */
@ -1826,7 +1826,7 @@ const struct tune_params arm_cortex_tune =
false, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_NOTHING, /* Fuseable pairs of instructions. */
-1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_OFF /* Sched L2 autopref. */
};
const struct tune_params arm_cortex_a8_tune =
@ -1847,7 +1847,7 @@ const struct tune_params arm_cortex_a8_tune =
true, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_NOTHING, /* Fuseable pairs of instructions. */
-1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_OFF /* Sched L2 autopref. */
};
const struct tune_params arm_cortex_a7_tune =
@ -1868,7 +1868,7 @@ const struct tune_params arm_cortex_a7_tune =
true, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_NOTHING, /* Fuseable pairs of instructions. */
-1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_OFF /* Sched L2 autopref. */
};
const struct tune_params arm_cortex_a15_tune =
@ -1889,7 +1889,7 @@ const struct tune_params arm_cortex_a15_tune =
true, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_NOTHING, /* Fuseable pairs of instructions. */
max_insn_queue_index + 1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_FULL /* Sched L2 autopref. */
};
const struct tune_params arm_cortex_a53_tune =
@ -1910,7 +1910,7 @@ const struct tune_params arm_cortex_a53_tune =
false, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_MOVW_MOVT, /* Fuseable pairs of instructions. */
-1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_OFF /* Sched L2 autopref. */
};
const struct tune_params arm_cortex_a57_tune =
@ -1931,7 +1931,7 @@ const struct tune_params arm_cortex_a57_tune =
false, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_MOVW_MOVT, /* Fuseable pairs of instructions. */
max_insn_queue_index + 1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_FULL /* Sched L2 autopref. */
};
const struct tune_params arm_xgene1_tune =
@ -1952,7 +1952,7 @@ const struct tune_params arm_xgene1_tune =
false, /* Prefer Neon for stringops. */
32, /* Maximum insns to inline memset. */
ARM_FUSE_NOTHING, /* Fuseable pairs of instructions. */
-1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_OFF /* Sched L2 autopref. */
};
/* Branches can be dual-issued on Cortex-A5, so conditional execution is
@ -1976,7 +1976,7 @@ const struct tune_params arm_cortex_a5_tune =
true, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_NOTHING, /* Fuseable pairs of instructions. */
-1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_OFF /* Sched L2 autopref. */
};
const struct tune_params arm_cortex_a9_tune =
@ -1997,7 +1997,7 @@ const struct tune_params arm_cortex_a9_tune =
false, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_NOTHING, /* Fuseable pairs of instructions. */
-1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_OFF /* Sched L2 autopref. */
};
const struct tune_params arm_cortex_a12_tune =
@ -2018,7 +2018,7 @@ const struct tune_params arm_cortex_a12_tune =
true, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_MOVW_MOVT, /* Fuseable pairs of instructions. */
-1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_OFF /* Sched L2 autopref. */
};
/* armv7m tuning. On Cortex-M4 cores for example, MOVW/MOVT take a single
@ -2046,7 +2046,7 @@ const struct tune_params arm_v7m_tune =
false, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_NOTHING, /* Fuseable pairs of instructions. */
-1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_OFF /* Sched L2 autopref. */
};
/* Cortex-M7 tuning. */
@ -2069,7 +2069,7 @@ const struct tune_params arm_cortex_m7_tune =
false, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_NOTHING, /* Fuseable pairs of instructions. */
-1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_OFF /* Sched L2 autopref. */
};
/* The arm_v6m_tune is duplicated from arm_cortex_tune, rather than
@ -2092,7 +2092,7 @@ const struct tune_params arm_v6m_tune =
false, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_NOTHING, /* Fuseable pairs of instructions. */
-1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_OFF /* Sched L2 autopref. */
};
const struct tune_params arm_fa726te_tune =
@ -2113,7 +2113,7 @@ const struct tune_params arm_fa726te_tune =
false, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_NOTHING, /* Fuseable pairs of instructions. */
-1 /* Sched L2 autopref depth. */
ARM_SCHED_AUTOPREF_OFF /* Sched L2 autopref. */
};
@ -3171,8 +3171,17 @@ arm_option_override (void)
/* Look through ready list and all of queue for instructions
relevant for L2 auto-prefetcher. */
int param_sched_autopref_queue_depth;
if (current_tune->sched_autopref == ARM_SCHED_AUTOPREF_OFF)
param_sched_autopref_queue_depth = -1;
else if (current_tune->sched_autopref == ARM_SCHED_AUTOPREF_RANK)
param_sched_autopref_queue_depth = 0;
else if (current_tune->sched_autopref == ARM_SCHED_AUTOPREF_FULL)
param_sched_autopref_queue_depth = max_insn_queue_index + 1;
else
gcc_unreachable ();
maybe_set_param_value (PARAM_SCHED_AUTOPREF_QUEUE_DEPTH,
current_tune->sched_autopref_queue_depth,
param_sched_autopref_queue_depth,
global_options.x_param_values,
global_options_set.x_param_values);