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rs6000.md: Add missing int register target case to movdf_low.

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* config/rs6000/rs6000.md: Add missing int register
        target case to movdf_low.

From-SVN: r48653
This commit is contained in:
Dale Johannesen 2002-01-08 19:14:51 +00:00 • committed by Dale Johannesen
parent 00cc944db9
commit 234e114cff
2 changed files with 31 additions and 4 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2002-01-08 Dale Johannesen <dalej@apple.com>
* config/rs6000/rs6000.md: Add missing int register
target case to movdf_low.
2002-01-08 Zack Weinberg <zack@codesourcery.com>
* Makefile.in (cs-tconfig.h): Don't depend on $(CONFIG_H) or

30
gcc/config/rs6000/rs6000.md
View file

@ -7590,13 +7590,35 @@
(set_attr "length" "4")])
(define_insn "movdf_low"
[(set (match_operand:DF 0 "gpc_reg_operand" "=f")
(mem:DF (lo_sum:SI (match_operand:SI 1 "register_operand" "b")
[(set (match_operand:DF 0 "gpc_reg_operand" "=f,!r")
(mem:DF (lo_sum:SI (match_operand:SI 1 "register_operand" "b,b")
(match_operand 2 "" ""))))]
"TARGET_MACHO && TARGET_HARD_FLOAT && ! TARGET_64BIT"
"lfd %0,lo16(%2)(%1)"
"*
{
switch (which_alternative)
{
case 0:
return \"lfd %0,lo16(%2)(%1)\";
case 1:
{
rtx operands2[4];
operands2[0] = operands[0];
operands2[1] = operands[1];
operands2[2] = operands[2];
operands2[3] = gen_rtx_REG (SImode, PIC_OFFSET_TABLE_REGNUM);
output_asm_insn (\"{l|lwz} %0,lo16(%2)(%1)\", operands);
/* We cannot rely on ha16(low half)==ha16(high half), alas,
although in practice it almost always is. */
output_asm_insn (\"{cau|addis} %L0,%3,ha16(%2+4)\", operands2);
return (\"{l|lwz} %L0,lo16(%2+4)(%L0)\");
}
default:
abort();
}
}"
[(set_attr "type" "load")
(set_attr "length" "4")])
(set_attr "length" "4,12")])
(define_insn "movdf_low_st"
[(set (mem:DF (lo_sum:SI (match_operand:SI 1 "register_operand" "b")