re PR target/19065 (Make CRIS libstdc++ asms autoincrement-safe)
PR target/19065.
* config/cris/cris.h (EXTRA_CONSTRAINT_Q): Accept only (mem (reg)),
not including (reg). Do not check for reg being CRIS_PC_REGNUM.
(EXTRA_MEMORY_CONSTRAINT): Define as 'Q'.
* config/cris/cris.md: Tweak comments referring to Q.
("cmpsi", "cmphi", "cmpqi", "*movsi_internal", "movhi")
("movstricthi", "movqi", "movstrictqi", "movsf", "addsi3")
("addhi3", "addqi3", "subsi3", "subhi3", "subqi3")
("*expanded_andsi", "*expanded_andhi", "*andhi_lowpart", "andqi3")
("*andqi_lowpart", "iorsi3", "iorhi3", "iorqi3", "uminsi3"):
Insert spaces in constraints to align alternatives vertically for
readability.
("cmphi"): Ditto. Add separate alternative for operand 0 "Q>",
operand 1: "M".
From-SVN: r95647
This commit is contained in:
Hans-Peter Nilsson
Hans-Peter Nilsson
parent
5902435e9a
commit
23369befff
3 changed files with 93 additions and 75 deletions
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@ -1,3 +1,20 @@
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2005-02-28 Hans-Peter Nilsson <hp@axis.com>
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PR target/19065.
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* config/cris/cris.h (EXTRA_CONSTRAINT_Q): Accept only (mem (reg)),
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not including (reg). Do not check for reg being CRIS_PC_REGNUM.
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(EXTRA_MEMORY_CONSTRAINT): Define as 'Q'.
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* config/cris/cris.md: Tweak comments referring to Q.
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("cmpsi", "cmphi", "cmpqi", "*movsi_internal", "movhi")
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("movstricthi", "movqi", "movstrictqi", "movsf", "addsi3")
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("addhi3", "addqi3", "subsi3", "subhi3", "subqi3")
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("*expanded_andsi", "*expanded_andhi", "*andhi_lowpart", "andqi3")
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("*andqi_lowpart", "iorsi3", "iorhi3", "iorqi3", "uminsi3"):
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Insert spaces in constraints to align alternatives vertically for
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readability.
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("cmphi"): Ditto. Add separate alternative for operand 0 "Q>",
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operand 1: "M".
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2005-02-27 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
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PR rtl-optimization/17728
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@ -772,14 +772,14 @@ enum reg_class {NO_REGS, ALL_REGS, LIM_REG_CLASSES};
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(C) == 'U' ? EXTRA_CONSTRAINT_U (X) : \
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0)
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#define EXTRA_MEMORY_CONSTRAINT(X, STR) ((X) == 'Q')
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#define EXTRA_CONSTRAINT_Q(X) \
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( \
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/* Slottable addressing modes: \
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A register? FIXME: Unnecessary. */ \
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(BASE_P (X) && REGNO (X) != CRIS_PC_REGNUM) \
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/* Indirect register: [reg]? */ \
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|| (GET_CODE (X) == MEM && BASE_P (XEXP (X, 0)) \
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&& REGNO (XEXP (X, 0)) != CRIS_PC_REGNUM) \
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/* Just an indirect register (happens to also be \
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"all" slottable memory addressing modes not \
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covered by other constraints, i.e. '>'). */ \
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GET_CODE (X) == MEM && BASE_P (XEXP (X, 0)) \
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)
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#define EXTRA_CONSTRAINT_R(X) \
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@ -1,5 +1,5 @@
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;; GCC machine description for CRIS cpu cores.
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;; Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004
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;; Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
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;; Free Software Foundation, Inc.
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;; Contributed by Axis Communications.
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@ -91,9 +91,9 @@
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;; mode, but that would need more attributes and hairier, more error
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;; prone code.
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;;
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;; There is an extra constraint, 'Q', which recognizes indirect reg,
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;; except when the reg is pc. The constraints 'Q' and '>' together match
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;; all possible memory operands that are slottable.
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;; There is an extra memory constraint, 'Q', which recognizes an indirect
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;; register. The constraints 'Q' and '>' together match all possible
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;; memory operands that are slottable.
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;; For other operands, you need to check if it has a valid "slottable"
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;; quick-immediate operand, where the particular signedness-variation
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;; may match the constraints 'I' or 'J'.), and include it in the
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@ -268,8 +268,8 @@
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(define_insn "cmpsi"
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[(set (cc0)
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(compare
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(match_operand:SI 0 "nonimmediate_operand" "r,r,r,r,Q>,Q>,r,r,m,m")
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(match_operand:SI 1 "general_operand" "I,r,Q>,M,M,r,P,g,M,r")))]
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(match_operand:SI 0 "nonimmediate_operand" "r,r,r, r,Q>,Q>,r,r,m,m")
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(match_operand:SI 1 "general_operand" "I,r,Q>,M,M, r, P,g,M,r")))]
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""
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"@
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cmpq %1,%0
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@ -286,24 +286,25 @@
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(define_insn "cmphi"
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[(set (cc0)
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(compare (match_operand:HI 0 "nonimmediate_operand" "r,r,Q>,Q>,r,m,m")
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(match_operand:HI 1 "general_operand" "r,Q>,M,r,g,M,r")))]
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(compare (match_operand:HI 0 "nonimmediate_operand" "r,r, r,Q>,Q>,r,m,m")
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(match_operand:HI 1 "general_operand" "r,Q>,M,M, r, g,M,r")))]
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""
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"@
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cmp.w %1,%0
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cmp.w %1,%0
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test.w %0
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test.w %0
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cmp.w %0,%1
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cmp.w %1,%0
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test.w %0
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cmp.w %0,%1"
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[(set_attr "slottable" "yes,yes,yes,yes,no,no,no")])
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[(set_attr "slottable" "yes,yes,yes,yes,yes,no,no,no")])
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(define_insn "cmpqi"
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[(set (cc0)
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(compare
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(match_operand:QI 0 "nonimmediate_operand" "r,r,r,Q>,Q>,r,m,m")
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(match_operand:QI 1 "general_operand" "r,Q>,M,M,r,g,M,r")))]
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(match_operand:QI 0 "nonimmediate_operand" "r,r, r,Q>,Q>,r,m,m")
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(match_operand:QI 1 "general_operand" "r,Q>,M,M, r, g,M,r")))]
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""
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"@
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cmp.b %1,%0
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@ -993,11 +994,11 @@
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(define_insn "*movsi_internal"
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[(set
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(match_operand:SI 0 "nonimmediate_operand" "=r,r,r,Q>,r,Q>,g,r,r,r,g")
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(match_operand:SI 0 "nonimmediate_operand" "=r,r, r,Q>,r,Q>,g,r,r,r,g")
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(match_operand:SI 1
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;; FIXME: We want to put S last, but apparently g matches S.
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;; It's a bug: an S is not a general_operand and shouldn't match g.
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"cris_general_operand_or_gotless_symbol" "r,Q>,M,M,I,r,M,n,!S,g,r"))]
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"cris_general_operand_or_gotless_symbol" "r,Q>,M,M, I,r, M,n,!S,g,r"))]
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""
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"*
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{
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@ -1206,8 +1207,8 @@
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(define_insn "movhi"
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[(set
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(match_operand:HI 0 "nonimmediate_operand" "=r,r,r,Q>,r,Q>,r,r,r,g,g,r")
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(match_operand:HI 1 "general_operand" "r,Q>,M,M,I,r,L,O,n,M,r,g"))]
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(match_operand:HI 0 "nonimmediate_operand" "=r,r, r,Q>,r,Q>,r,r,r,g,g,r")
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(match_operand:HI 1 "general_operand" "r,Q>,M,M, I,r, L,O,n,M,r,g"))]
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""
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"*
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{
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@ -1249,8 +1250,8 @@
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(define_insn "movstricthi"
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[(set
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(strict_low_part
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(match_operand:HI 0 "nonimmediate_operand" "+r,r,r,Q>,Q>,g,r,g"))
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(match_operand:HI 1 "general_operand" "r,Q>,M,M,r,M,g,r"))]
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(match_operand:HI 0 "nonimmediate_operand" "+r,r, r,Q>,Q>,g,r,g"))
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(match_operand:HI 1 "general_operand" "r,Q>,M,M, r, M,g,r"))]
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""
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"@
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move.w %1,%0
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@ -1264,8 +1265,8 @@
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[(set_attr "slottable" "yes,yes,yes,yes,yes,no,no,no")])
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(define_insn "movqi"
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[(set (match_operand:QI 0 "nonimmediate_operand" "=r,Q>,r,r,Q>,r,g,g,r,r")
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(match_operand:QI 1 "general_operand" "r,r,Q>,M,M,I,M,r,O,g"))]
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[(set (match_operand:QI 0 "nonimmediate_operand" "=r,Q>,r, r,Q>,r,g,g,r,r")
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(match_operand:QI 1 "general_operand" "r,r, Q>,M,M, I,M,r,O,g"))]
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""
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"@
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move.b %1,%0
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@ -1286,8 +1287,8 @@
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(define_insn "movstrictqi"
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[(set (strict_low_part
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(match_operand:QI 0 "nonimmediate_operand" "+r,Q>,r,r,Q>,g,g,r"))
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(match_operand:QI 1 "general_operand" "r,r,Q>,M,M,M,r,g"))]
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(match_operand:QI 0 "nonimmediate_operand" "+r,Q>,r, r,Q>,g,g,r"))
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(match_operand:QI 1 "general_operand" "r,r, Q>,M,M, M,r,g"))]
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""
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"@
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move.b %1,%0
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@ -1306,8 +1307,8 @@
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;; It will use clear, so we know ALL types of immediate 0 never change cc.
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(define_insn "movsf"
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[(set (match_operand:SF 0 "nonimmediate_operand" "=r,Q>,r,r,Q>,g,g,r")
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(match_operand:SF 1 "general_operand" "r,r,Q>,G,G,G,r,g"))]
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[(set (match_operand:SF 0 "nonimmediate_operand" "=r,Q>,r, r,Q>,g,g,r")
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(match_operand:SF 1 "general_operand" "r,r, Q>,G,G, G,r,g"))]
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""
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"@
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move.d %1,%0
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@ -1720,10 +1721,10 @@
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add.d %M2,%M1,%M0\;ax\;add.d %H2,%H1,%H0")
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(define_insn "addsi3"
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[(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r,r,r")
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[(set (match_operand:SI 0 "register_operand" "=r,r, r,r,r,r,r, r")
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(plus:SI
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(match_operand:SI 1 "register_operand" "%0,0,0,0,0,0,r,r")
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(match_operand:SI 2 "general_operand" "r,Q>,J,N,n,g,!To,0")))]
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(match_operand:SI 1 "register_operand" "%0,0, 0,0,0,0,r, r")
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(match_operand:SI 2 "general_operand" "r,Q>,J,N,n,g,!To,0")))]
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;; The last constraint is due to that after reload, the '%' is not
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;; honored, and canonicalization doesn't care about keeping the same
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@ -1773,9 +1774,9 @@
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[(set_attr "slottable" "yes,yes,yes,yes,no,no,no,yes")])
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(define_insn "addhi3"
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[(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r,r")
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(plus:HI (match_operand:HI 1 "register_operand" "%0,0,0,0,0,r")
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(match_operand:HI 2 "general_operand" "r,Q>,J,N,g,!To")))]
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[(set (match_operand:HI 0 "register_operand" "=r,r, r,r,r,r")
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(plus:HI (match_operand:HI 1 "register_operand" "%0,0, 0,0,0,r")
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(match_operand:HI 2 "general_operand" "r,Q>,J,N,g,!To")))]
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""
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"@
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add.w %2,%0
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@ -1788,9 +1789,9 @@
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(set_attr "cc" "normal,normal,clobber,clobber,normal,normal")])
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(define_insn "addqi3"
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[(set (match_operand:QI 0 "register_operand" "=r,r,r,r,r,r,r")
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(plus:QI (match_operand:QI 1 "register_operand" "%0,0,0,0,0,0,r")
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(match_operand:QI 2 "general_operand" "r,Q>,J,N,O,g,!To")))]
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[(set (match_operand:QI 0 "register_operand" "=r,r, r,r,r,r,r")
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(plus:QI (match_operand:QI 1 "register_operand" "%0,0, 0,0,0,0,r")
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(match_operand:QI 2 "general_operand" "r,Q>,J,N,O,g,!To")))]
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""
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"@
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add.b %2,%0
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@ -1824,10 +1825,10 @@
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sub.d %M2,%M1,%M0\;ax\;sub.d %H2,%H1,%H0")
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(define_insn "subsi3"
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[(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r,r,r")
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[(set (match_operand:SI 0 "register_operand" "=r,r, r,r,r,r,r,r")
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(minus:SI
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(match_operand:SI 1 "register_operand" "0,0,0,0,0,0,0,r")
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(match_operand:SI 2 "general_operand" "r,Q>,J,N,P,n,g,!To")))]
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(match_operand:SI 1 "register_operand" "0,0, 0,0,0,0,0,r")
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(match_operand:SI 2 "general_operand" "r,Q>,J,N,P,n,g,!To")))]
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""
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;; This does not do the optimal: "addu.w 65535,r0" when %2 is negative.
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@ -1845,9 +1846,9 @@
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[(set_attr "slottable" "yes,yes,yes,yes,no,no,no,no")])
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(define_insn "subhi3"
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[(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r,r")
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(minus:HI (match_operand:HI 1 "register_operand" "0,0,0,0,0,r")
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(match_operand:HI 2 "general_operand" "r,Q>,J,N,g,!To")))]
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[(set (match_operand:HI 0 "register_operand" "=r,r, r,r,r,r")
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(minus:HI (match_operand:HI 1 "register_operand" "0,0, 0,0,0,r")
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(match_operand:HI 2 "general_operand" "r,Q>,J,N,g,!To")))]
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""
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"@
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sub.w %2,%0
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@ -1860,9 +1861,9 @@
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(set_attr "cc" "normal,normal,clobber,clobber,normal,normal")])
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(define_insn "subqi3"
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[(set (match_operand:QI 0 "register_operand" "=r,r,r,r,r,r")
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(minus:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,r")
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(match_operand:QI 2 "general_operand" "r,Q>,J,N,g,!To")))]
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[(set (match_operand:QI 0 "register_operand" "=r,r, r,r,r,r")
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(minus:QI (match_operand:QI 1 "register_operand" "0,0, 0,0,0,r")
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(match_operand:QI 2 "general_operand" "r,Q>,J,N,g,!To")))]
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""
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"@
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sub.b %2,%0
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@ -2734,9 +2735,9 @@
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;; improved reload pass.
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(define_insn "*expanded_andsi"
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[(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r")
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(and:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,r")
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(match_operand:SI 2 "general_operand" "I,r,Q>,g,!To")))]
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[(set (match_operand:SI 0 "register_operand" "=r,r,r, r,r")
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(and:SI (match_operand:SI 1 "register_operand" "%0,0,0, 0,r")
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(match_operand:SI 2 "general_operand" "I,r,Q>,g,!To")))]
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""
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"@
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andq %2,%0
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@ -2810,9 +2811,9 @@
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;; Catch-all andhi3 pattern.
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(define_insn "*expanded_andhi"
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[(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r,r,r")
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(and:HI (match_operand:HI 1 "register_operand" "%0,0,0,0,0,0,r")
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(match_operand:HI 2 "general_operand" "I,r,Q>,L,O,g,!To")))]
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[(set (match_operand:HI 0 "register_operand" "=r,r,r, r,r,r,r")
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(and:HI (match_operand:HI 1 "register_operand" "%0,0,0, 0,0,0,r")
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(match_operand:HI 2 "general_operand" "I,r,Q>,L,O,g,!To")))]
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;; Sidenote: the tightening from "general_operand" to
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;; "register_operand" for operand 1 actually increased the register
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@ -2835,9 +2836,9 @@
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(define_insn "*andhi_lowpart"
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[(set (strict_low_part
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(match_operand:HI 0 "register_operand" "=r,r,r,r,r,r"))
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(and:HI (match_operand:HI 1 "register_operand" "%0,0,0,0,0,r")
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(match_operand:HI 2 "general_operand" "r,Q>,L,O,g,!To")))]
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(match_operand:HI 0 "register_operand" "=r,r, r,r,r,r"))
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(and:HI (match_operand:HI 1 "register_operand" "%0,0, 0,0,0,r")
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(match_operand:HI 2 "general_operand" "r,Q>,L,O,g,!To")))]
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""
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"@
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and.w %2,%0
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@ -2850,9 +2851,9 @@
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(set_attr "cc" "normal,normal,normal,clobber,normal,normal")])
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(define_insn "andqi3"
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[(set (match_operand:QI 0 "register_operand" "=r,r,r,r,r,r")
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(and:QI (match_operand:QI 1 "register_operand" "%0,0,0,0,0,r")
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(match_operand:QI 2 "general_operand" "I,r,Q>,O,g,!To")))]
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[(set (match_operand:QI 0 "register_operand" "=r,r,r, r,r,r")
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(and:QI (match_operand:QI 1 "register_operand" "%0,0,0, 0,0,r")
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(match_operand:QI 2 "general_operand" "I,r,Q>,O,g,!To")))]
|
||||
""
|
||||
"@
|
||||
andq %2,%0
|
||||
|
|
@ -2866,9 +2867,9 @@
|
|||
|
||||
(define_insn "*andqi_lowpart"
|
||||
[(set (strict_low_part
|
||||
(match_operand:QI 0 "register_operand" "=r,r,r,r,r"))
|
||||
(and:QI (match_operand:QI 1 "register_operand" "%0,0,0,0,r")
|
||||
(match_operand:QI 2 "general_operand" "r,Q>,O,g,!To")))]
|
||||
(match_operand:QI 0 "register_operand" "=r,r, r,r,r"))
|
||||
(and:QI (match_operand:QI 1 "register_operand" "%0,0, 0,0,r")
|
||||
(match_operand:QI 2 "general_operand" "r,Q>,O,g,!To")))]
|
||||
""
|
||||
"@
|
||||
and.b %2,%0
|
||||
|
|
@ -2887,9 +2888,9 @@
|
|||
;; with andsi3.
|
||||
|
||||
(define_insn "iorsi3"
|
||||
[(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r")
|
||||
(ior:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,0,r")
|
||||
(match_operand:SI 2 "general_operand" "I,r,Q>,n,g,!To")))]
|
||||
[(set (match_operand:SI 0 "register_operand" "=r,r,r, r,r,r")
|
||||
(ior:SI (match_operand:SI 1 "register_operand" "%0,0,0, 0,0,r")
|
||||
(match_operand:SI 2 "general_operand" "I, r,Q>,n,g,!To")))]
|
||||
""
|
||||
"@
|
||||
orq %2,%0
|
||||
|
|
@ -2902,9 +2903,9 @@
|
|||
(set_attr "cc" "normal,normal,normal,clobber,normal,normal")])
|
||||
|
||||
(define_insn "iorhi3"
|
||||
[(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r,r,r")
|
||||
(ior:HI (match_operand:HI 1 "register_operand" "%0,0,0,0,0,0,r")
|
||||
(match_operand:HI 2 "general_operand" "I,r,Q>,L,O,g,!To")))]
|
||||
[(set (match_operand:HI 0 "register_operand" "=r,r,r, r,r,r,r")
|
||||
(ior:HI (match_operand:HI 1 "register_operand" "%0,0,0, 0,0,0,r")
|
||||
(match_operand:HI 2 "general_operand" "I,r,Q>,L,O,g,!To")))]
|
||||
""
|
||||
"@
|
||||
orq %2,%0
|
||||
|
|
@ -2918,9 +2919,9 @@
|
|||
(set_attr "cc" "clobber,normal,normal,normal,clobber,normal,normal")])
|
||||
|
||||
(define_insn "iorqi3"
|
||||
[(set (match_operand:QI 0 "register_operand" "=r,r,r,r,r,r")
|
||||
(ior:QI (match_operand:QI 1 "register_operand" "%0,0,0,0,0,r")
|
||||
(match_operand:QI 2 "general_operand" "I,r,Q>,O,g,!To")))]
|
||||
[(set (match_operand:QI 0 "register_operand" "=r,r,r, r,r,r")
|
||||
(ior:QI (match_operand:QI 1 "register_operand" "%0,0,0, 0,0,r")
|
||||
(match_operand:QI 2 "general_operand" "I,r,Q>,O,g,!To")))]
|
||||
""
|
||||
"@
|
||||
orq %2,%0
|
||||
|
|
@ -3340,9 +3341,9 @@
|
|||
;; normal code too.
|
||||
|
||||
(define_insn "uminsi3"
|
||||
[(set (match_operand:SI 0 "register_operand" "=r,r,r,r")
|
||||
(umin:SI (match_operand:SI 1 "register_operand" "%0,0,0,r")
|
||||
(match_operand:SI 2 "general_operand" "r,Q>,g,!STo")))]
|
||||
[(set (match_operand:SI 0 "register_operand" "=r,r, r,r")
|
||||
(umin:SI (match_operand:SI 1 "register_operand" "%0,0, 0,r")
|
||||
(match_operand:SI 2 "general_operand" "r,Q>,g,!STo")))]
|
||||
""
|
||||
"*
|
||||
{
|
||||
|
|
@ -3858,7 +3859,7 @@
|
|||
}")
|
||||
|
||||
;; Accept *anything* as operand 1. Accept operands for operand 0 in
|
||||
;; order of preference (Q includes r, but r is shorter, faster)
|
||||
;; order of preference.
|
||||
|
||||
(define_insn "*expanded_call"
|
||||
[(call (mem:QI (match_operand:SI
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue