re PR middle-end/37535 (gcc/libgcc2.c:404: internal compiler error: Floating point exception)
2008-10-15 Vladimir Makarov <vmakarov@redhat.com> PR middle-end/37535 * ira-lives.c (mark_early_clobbers): Remove. (make_pseudo_conflict, check_and_make_def_use_conflicts, check_and_make_def_conflicts, make_early_clobber_and_input_conflicts, mark_hard_reg_early_clobbers): New functions. (process_bb_node_lives): Call make_early_clobber_and_input_conflicts and mark_hard_reg_early_clobbers. Make hard register inputs live again. * doc/rtl.texi (clobber): Change descriotion of RA behaviour for early clobbers of pseudo-registers. From-SVN: r141160
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Vladimir Makarov
Vladimir Makarov
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0ca9fa56e9
commit
22c02455bf
3 changed files with 196 additions and 38 deletions
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@ -1,3 +1,19 @@
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2008-10-15 Vladimir Makarov <vmakarov@redhat.com>
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PR middle-end/37535
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* ira-lives.c (mark_early_clobbers): Remove.
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(make_pseudo_conflict, check_and_make_def_use_conflicts,
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check_and_make_def_conflicts,
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make_early_clobber_and_input_conflicts,
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mark_hard_reg_early_clobbers): New functions.
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(process_bb_node_lives): Call
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make_early_clobber_and_input_conflicts and
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mark_hard_reg_early_clobbers. Make hard register inputs live
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again.
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* doc/rtl.texi (clobber): Change descriotion of RA behaviour for
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early clobbers of pseudo-registers.
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2008-10-15 Vladimir Makarov <vmakarov@redhat.com>
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PR middle-end/37674
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@ -2917,11 +2917,12 @@ constituent instructions might not.
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When a @code{clobber} expression for a register appears inside a
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@code{parallel} with other side effects, the register allocator
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guarantees that the register is unoccupied both before and after that
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insn if it is a hard register clobber or the @samp{&} constraint
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is specified for at least one alternative (@pxref{Modifiers}) of the
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clobber. However, the reload phase may allocate a register used for
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one of the inputs unless the @samp{&} constraint is specified for the
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selected alternative. You can clobber either a specific hard
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insn if it is a hard register clobber. For pseudo-register clobber,
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the register allocator and the reload pass do not assign the same hard
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register to the clobber and the input operands if there is an insn
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alternative containing the @samp{&} constraint (@pxref{Modifiers}) for
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the clobber and the hard register is in register classes of the
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clobber in the alternative. You can clobber either a specific hard
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register, a pseudo register, or a @code{scratch} expression; in the
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latter two cases, GCC will allocate a hard register that is available
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there for use as a temporary.
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207
gcc/ira-lives.c
207
gcc/ira-lives.c
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@ -349,40 +349,170 @@ mark_ref_dead (df_ref def)
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mark_reg_dead (reg);
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}
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/* Mark early clobber registers of the current INSN as live (if
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LIVE_P) or dead. Return true if there are such registers. */
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/* Make pseudo REG conflicting with pseudo DREG, if the 1st pseudo
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class is intersected with class CL. Advance the current program
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point before making the conflict if ADVANCE_P. Return TRUE if we
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will need to advance the current program point. */
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static bool
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mark_early_clobbers (rtx insn, bool live_p)
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make_pseudo_conflict (rtx reg, enum reg_class cl, rtx dreg, bool advance_p)
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{
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ira_allocno_t a;
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if (GET_CODE (reg) == SUBREG)
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reg = SUBREG_REG (reg);
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if (! REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
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return advance_p;
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a = ira_curr_regno_allocno_map[REGNO (reg)];
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if (! reg_classes_intersect_p (cl, ALLOCNO_COVER_CLASS (a)))
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return advance_p;
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if (advance_p)
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curr_point++;
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mark_reg_live (reg);
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mark_reg_live (dreg);
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mark_reg_dead (reg);
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mark_reg_dead (dreg);
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return false;
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}
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/* Check and make if necessary conflicts for pseudo DREG of class
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DEF_CL of the current insn with input operand USE of class USE_CL.
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Advance the current program point before making the conflict if
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ADVANCE_P. Return TRUE if we will need to advance the current
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program point. */
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static bool
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check_and_make_def_use_conflict (rtx dreg, enum reg_class def_cl,
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int use, enum reg_class use_cl,
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bool advance_p)
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{
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if (! reg_classes_intersect_p (def_cl, use_cl))
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return advance_p;
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advance_p = make_pseudo_conflict (recog_data.operand[use],
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use_cl, dreg, advance_p);
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/* Reload may end up swapping commutative operands, so you
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have to take both orderings into account. The
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constraints for the two operands can be completely
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different. (Indeed, if the constraints for the two
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operands are the same for all alternatives, there's no
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point marking them as commutative.) */
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if (use < recog_data.n_operands + 1
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&& recog_data.constraints[use][0] == '%')
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advance_p
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= make_pseudo_conflict (recog_data.operand[use + 1],
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use_cl, dreg, advance_p);
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if (use >= 1
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&& recog_data.constraints[use - 1][0] == '%')
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advance_p
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= make_pseudo_conflict (recog_data.operand[use - 1],
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use_cl, dreg, advance_p);
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return advance_p;
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}
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/* Check and make if necessary conflicts for definition DEF of class
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DEF_CL of the current insn with input operands. Process only
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constraints of alternative ALT. */
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static void
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check_and_make_def_conflict (int alt, int def, enum reg_class def_cl)
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{
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int use, use_match;
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ira_allocno_t a;
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enum reg_class use_cl, acl;
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bool advance_p;
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rtx dreg = recog_data.operand[def];
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if (def_cl == NO_REGS)
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return;
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if (GET_CODE (dreg) == SUBREG)
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dreg = SUBREG_REG (dreg);
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if (! REG_P (dreg) || REGNO (dreg) < FIRST_PSEUDO_REGISTER)
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return;
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a = ira_curr_regno_allocno_map[REGNO (dreg)];
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acl = ALLOCNO_COVER_CLASS (a);
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if (! reg_classes_intersect_p (acl, def_cl))
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return;
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advance_p = true;
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for (use = 0; use < recog_data.n_operands; use++)
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{
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if (use == def || recog_data.operand_type[use] == OP_OUT)
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return;
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if (recog_op_alt[use][alt].anything_ok)
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use_cl = ALL_REGS;
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else
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use_cl = recog_op_alt[use][alt].cl;
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advance_p = check_and_make_def_use_conflict (dreg, def_cl, use,
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use_cl, advance_p);
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if ((use_match = recog_op_alt[use][alt].matches) >= 0)
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{
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if (use_match == def)
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return;
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if (recog_op_alt[use_match][alt].anything_ok)
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use_cl = ALL_REGS;
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else
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use_cl = recog_op_alt[use_match][alt].cl;
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advance_p = check_and_make_def_use_conflict (dreg, def_cl, use,
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use_cl, advance_p);
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}
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}
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}
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/* Make conflicts of early clobber pseudo registers of the current
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insn with its inputs. Avoid introducing unnecessary conflicts by
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checking classes of the constraints and pseudos because otherwise
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significant code degradation is possible for some targets. */
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static void
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make_early_clobber_and_input_conflicts (void)
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{
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int alt;
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int def;
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int def, def_match;
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enum reg_class def_cl;
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for (alt = 0; alt < recog_data.n_alternatives; alt++)
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for (def = 0; def < recog_data.n_operands; def++)
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{
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def_cl = NO_REGS;
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if (recog_op_alt[def][alt].earlyclobber)
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{
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if (recog_op_alt[def][alt].anything_ok)
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def_cl = ALL_REGS;
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else
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def_cl = recog_op_alt[def][alt].cl;
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check_and_make_def_conflict (alt, def, def_cl);
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}
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if ((def_match = recog_op_alt[def][alt].matches) >= 0
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&& (recog_op_alt[def_match][alt].earlyclobber
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|| recog_op_alt[def][alt].earlyclobber))
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{
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if (recog_op_alt[def_match][alt].anything_ok)
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def_cl = ALL_REGS;
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else
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def_cl = recog_op_alt[def_match][alt].cl;
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check_and_make_def_conflict (alt, def, def_cl);
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}
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}
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}
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/* Mark early clobber hard registers of the current INSN as live (if
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LIVE_P) or dead. Return true if there are such registers. */
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static bool
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mark_hard_reg_early_clobbers (rtx insn, bool live_p)
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{
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df_ref *def_rec;
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bool set_p = false;
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for (def = 0; def < recog_data.n_operands; def++)
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{
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rtx dreg = recog_data.operand[def];
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if (GET_CODE (dreg) == SUBREG)
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dreg = SUBREG_REG (dreg);
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if (! REG_P (dreg))
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continue;
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for (alt = 0; alt < recog_data.n_alternatives; alt++)
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if ((recog_op_alt[def][alt].earlyclobber)
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&& (recog_op_alt[def][alt].cl != NO_REGS))
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break;
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if (alt >= recog_data.n_alternatives)
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continue;
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if (live_p)
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mark_reg_live (dreg);
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else
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mark_reg_dead (dreg);
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set_p = true;
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}
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for (def_rec = DF_INSN_DEFS (insn); *def_rec; def_rec++)
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if (DF_REF_FLAGS_IS_SET (*def_rec, DF_REF_MUST_CLOBBER))
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{
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@ -792,25 +922,36 @@ process_bb_node_lives (ira_loop_tree_node_t loop_tree_node)
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}
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}
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make_early_clobber_and_input_conflicts ();
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curr_point++;
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/* Mark each used value as live. */
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for (use_rec = DF_INSN_USES (insn); *use_rec; use_rec++)
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mark_ref_live (*use_rec);
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set_p = mark_early_clobbers (insn, true);
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process_single_reg_class_operands (true, freq);
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set_p = mark_hard_reg_early_clobbers (insn, true);
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if (set_p)
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{
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mark_early_clobbers (insn, false);
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mark_hard_reg_early_clobbers (insn, false);
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/* Mark each used value as live again. For example, a
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/* Mark each hard reg as live again. For example, a
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hard register can be in clobber and in an insn
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input. */
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for (use_rec = DF_INSN_USES (insn); *use_rec; use_rec++)
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mark_ref_live (*use_rec);
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{
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rtx ureg = DF_REF_REG (*use_rec);
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if (GET_CODE (ureg) == SUBREG)
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ureg = SUBREG_REG (ureg);
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if (! REG_P (ureg) || REGNO (ureg) >= FIRST_PSEUDO_REGISTER)
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continue;
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mark_ref_live (*use_rec);
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}
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}
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curr_point++;
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