i386: Zero extend 32-bit address to 64-bit with option -mx32 -maddress-mode=long. [PR 117418]

-maddress-mode=long let Pmode = DI_mode, so zero extend 32-bit address to
64-bit and uses a 64-bit register as a pointer for avoid raise an ICE.

gcc/ChangeLog:

	PR target/117418
	* config/i386/i386-expand.cc (ix86_expand_builtin): Convert
	pointer's mode according to Pmode.

gcc/testsuite/ChangeLog:

	PR target/117418
	* gcc.target/i386/pr117418-1.c: New test.
This commit is contained in:
Hu, Lin1 2024-11-06 15:42:13 +08:00
parent 9e423b5c99
commit 2272cd2508
2 changed files with 36 additions and 0 deletions

View file

@ -14064,6 +14064,9 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
op1 = expand_normal (arg1);
op2 = expand_normal (arg2);
if (GET_MODE (op1) != Pmode)
op1 = convert_to_mode (Pmode, op1, 1);
if (!address_operand (op2, VOIDmode))
{
op2 = convert_memory_address (Pmode, op2);
@ -14099,6 +14102,9 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
emit_label (ok_label);
emit_insn (gen_rtx_SET (target, pat));
if (GET_MODE (op0) != Pmode)
op0 = convert_to_mode (Pmode, op0, 1);
for (i = 0; i < 8; i++)
{
op = gen_rtx_MEM (V2DImode,
@ -14123,6 +14129,9 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
if (!REG_P (op0))
op0 = copy_to_mode_reg (SImode, op0);
if (GET_MODE (op2) != Pmode)
op2 = convert_to_mode (Pmode, op2, 1);
op = gen_rtx_REG (V2DImode, GET_SSE_REGNO (0));
emit_move_insn (op, op1);
@ -14160,6 +14169,9 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
if (!REG_P (op0))
op0 = copy_to_mode_reg (SImode, op0);
if (GET_MODE (op3) != Pmode)
op3 = convert_to_mode (Pmode, op3, 1);
/* Force to use xmm0, xmm1 for keylow, keyhi*/
op = gen_rtx_REG (V2DImode, GET_SSE_REGNO (0));
emit_move_insn (op, op1);

View file

@ -0,0 +1,24 @@
/* PR target/117418 */
/* { dg-do compile { target { ! ia32 } } } */
/* { dg-options "-maddress-mode=long -mwidekl -mx32" } */
/* { dg-require-effective-target maybe_x32 } */
/* { dg-final { scan-assembler-times "aesdec128kl" 1 } } */
/* { dg-final { scan-assembler-times "aesdec256kl" 1 } } */
/* { dg-final { scan-assembler-times "aesenc128kl" 1 } } */
/* { dg-final { scan-assembler-times "aesenc256kl" 1 } } */
/* { dg-final { scan-assembler-times "encodekey128" 1 } } */
/* { dg-final { scan-assembler-times "encodekey256" 1 } } */
typedef __attribute__((__vector_size__(16))) long long V;
V a;
void
foo()
{
__builtin_ia32_aesdec128kl_u8 (&a, a, &a);
__builtin_ia32_aesdec256kl_u8 (&a, a, &a);
__builtin_ia32_aesenc128kl_u8 (&a, a, &a);
__builtin_ia32_aesenc256kl_u8 (&a, a, &a);
__builtin_ia32_encodekey128_u32 (0, a, &a);
__builtin_ia32_encodekey256_u32 (0, a, a, &a);
}