Fortran: add support for IEEE intrinsics on aarch64 non-glibc targets
This enables IEEE support on the upcoming aarch64-apple-darwin target, and has been tested for some time in an external port. libgfortran/ChangeLog: * configure.host: Add aarch64-apple-darwin support. * config/fpu-aarch64.h: New file.
This commit is contained in:
Francois-Xavier Coudert
parent
78fe0f23c7
commit
220b9bdfe8
2 changed files with 346 additions and 3 deletions
331
libgfortran/config/fpu-aarch64.h
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331
libgfortran/config/fpu-aarch64.h
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/* FPU-related code for aarch64.
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Copyright (C) 2020 Free Software Foundation, Inc.
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Contributed by Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
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This file is part of the GNU Fortran runtime library (libgfortran).
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Libgfortran is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public
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License as published by the Free Software Foundation; either
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version 3 of the License, or (at your option) any later version.
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Libgfortran is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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/* Rounding mask and modes */
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#define FPCR_RM_MASK 0x0c00000
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#define FE_TONEAREST 0x0000000
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#define FE_UPWARD 0x0400000
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#define FE_DOWNWARD 0x0800000
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#define FE_TOWARDZERO 0x0c00000
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#define FE_MAP_FZ 0x1000000
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/* Exceptions */
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#define FE_INVALID 1
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#define FE_DIVBYZERO 2
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#define FE_OVERFLOW 4
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#define FE_UNDERFLOW 8
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#define FE_INEXACT 16
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#define FE_ALL_EXCEPT (FE_INVALID | FE_DIVBYZERO | FE_OVERFLOW | FE_UNDERFLOW | FE_INEXACT)
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#define FE_EXCEPT_SHIFT 8
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/* This structure corresponds to the layout of the block
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written by FSTENV. */
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struct fenv
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{
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unsigned int __fpcr;
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unsigned int __fpsr;
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};
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/* Check we can actually store the FPU state in the allocated size. */
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_Static_assert (sizeof(struct fenv) <= (size_t) GFC_FPE_STATE_BUFFER_SIZE,
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"GFC_FPE_STATE_BUFFER_SIZE is too small");
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void
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set_fpu (void)
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{
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if (options.fpe & GFC_FPE_DENORMAL)
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estr_write ("Fortran runtime warning: Floating point 'denormal operand' "
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"exception not supported.\n");
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set_fpu_trap_exceptions (options.fpe, 0);
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}
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int
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get_fpu_trap_exceptions (void)
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{
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unsigned int fpcr, exceptions;
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int res = 0;
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fpcr = __builtin_aarch64_get_fpcr();
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exceptions = (fpcr >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT;
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if (exceptions & FE_INVALID) res |= GFC_FPE_INVALID;
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if (exceptions & FE_DIVBYZERO) res |= GFC_FPE_ZERO;
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if (exceptions & FE_OVERFLOW) res |= GFC_FPE_OVERFLOW;
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if (exceptions & FE_UNDERFLOW) res |= GFC_FPE_UNDERFLOW;
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if (exceptions & FE_INEXACT) res |= GFC_FPE_INEXACT;
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return res;
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}
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void set_fpu_trap_exceptions (int trap, int notrap)
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{
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unsigned int mode_set = 0, mode_clr = 0;
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unsigned int fpsr, fpsr_new;
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unsigned int fpcr, fpcr_new;
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if (trap & GFC_FPE_INVALID)
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mode_set |= FE_INVALID;
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if (notrap & GFC_FPE_INVALID)
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mode_clr |= FE_INVALID;
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if (trap & GFC_FPE_ZERO)
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mode_set |= FE_DIVBYZERO;
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if (notrap & GFC_FPE_ZERO)
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mode_clr |= FE_DIVBYZERO;
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if (trap & GFC_FPE_OVERFLOW)
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mode_set |= FE_OVERFLOW;
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if (notrap & GFC_FPE_OVERFLOW)
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mode_clr |= FE_OVERFLOW;
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if (trap & GFC_FPE_UNDERFLOW)
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mode_set |= FE_UNDERFLOW;
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if (notrap & GFC_FPE_UNDERFLOW)
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mode_clr |= FE_UNDERFLOW;
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if (trap & GFC_FPE_INEXACT)
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mode_set |= FE_INEXACT;
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if (notrap & GFC_FPE_INEXACT)
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mode_clr |= FE_INEXACT;
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/* Clear stalled exception flags. */
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fpsr = __builtin_aarch64_get_fpsr();
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fpsr_new = fpsr & ~FE_ALL_EXCEPT;
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if (fpsr_new != fpsr)
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__builtin_aarch64_set_fpsr(fpsr_new);
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fpcr_new = fpcr = __builtin_aarch64_get_fpcr();
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fpcr_new |= (mode_set << FE_EXCEPT_SHIFT);
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fpcr_new &= ~(mode_clr << FE_EXCEPT_SHIFT);
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if (fpcr_new != fpcr)
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__builtin_aarch64_set_fpcr(fpcr_new);
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}
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int
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support_fpu_flag (int flag)
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{
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if (flag & GFC_FPE_DENORMAL)
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return 0;
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return 1;
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}
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int
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support_fpu_trap (int flag)
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{
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if (flag & GFC_FPE_DENORMAL)
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return 0;
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return 1;
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}
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int
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get_fpu_except_flags (void)
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{
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int result;
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unsigned int fpsr;
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result = 0;
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fpsr = __builtin_aarch64_get_fpsr() & FE_ALL_EXCEPT;
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if (fpsr & FE_INVALID)
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result |= GFC_FPE_INVALID;
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if (fpsr & FE_DIVBYZERO)
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result |= GFC_FPE_ZERO;
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if (fpsr & FE_OVERFLOW)
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result |= GFC_FPE_OVERFLOW;
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if (fpsr & FE_UNDERFLOW)
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result |= GFC_FPE_UNDERFLOW;
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if (fpsr & FE_INEXACT)
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result |= GFC_FPE_INEXACT;
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return result;
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}
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void
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set_fpu_except_flags (int set, int clear)
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{
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unsigned int exc_set = 0, exc_clr = 0;
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unsigned int fpsr, fpsr_new;
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if (set & GFC_FPE_INVALID)
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exc_set |= FE_INVALID;
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else if (clear & GFC_FPE_INVALID)
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exc_clr |= FE_INVALID;
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if (set & GFC_FPE_ZERO)
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exc_set |= FE_DIVBYZERO;
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else if (clear & GFC_FPE_ZERO)
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exc_clr |= FE_DIVBYZERO;
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if (set & GFC_FPE_OVERFLOW)
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exc_set |= FE_OVERFLOW;
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else if (clear & GFC_FPE_OVERFLOW)
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exc_clr |= FE_OVERFLOW;
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if (set & GFC_FPE_UNDERFLOW)
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exc_set |= FE_UNDERFLOW;
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else if (clear & GFC_FPE_UNDERFLOW)
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exc_clr |= FE_UNDERFLOW;
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if (set & GFC_FPE_INEXACT)
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exc_set |= FE_INEXACT;
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else if (clear & GFC_FPE_INEXACT)
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exc_clr |= FE_INEXACT;
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fpsr_new = fpsr = __builtin_aarch64_get_fpsr();
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fpsr_new &= ~exc_clr;
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fpsr_new |= exc_set;
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if (fpsr_new != fpsr)
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__builtin_aarch64_set_fpsr(fpsr_new);
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}
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void
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get_fpu_state (void *state)
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{
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struct fenv *envp = state;
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envp->__fpcr = __builtin_aarch64_get_fpcr();
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envp->__fpsr = __builtin_aarch64_get_fpsr();
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}
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void
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set_fpu_state (void *state)
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{
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struct fenv *envp = state;
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__builtin_aarch64_set_fpcr(envp->__fpcr);
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__builtin_aarch64_set_fpsr(envp->__fpsr);
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}
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int
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get_fpu_rounding_mode (void)
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{
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unsigned int fpcr = __builtin_aarch64_get_fpcr();
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fpcr &= FPCR_RM_MASK;
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switch (fpcr)
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{
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case FE_TONEAREST:
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return GFC_FPE_TONEAREST;
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case FE_UPWARD:
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return GFC_FPE_UPWARD;
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case FE_DOWNWARD:
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return GFC_FPE_DOWNWARD;
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case FE_TOWARDZERO:
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return GFC_FPE_TOWARDZERO;
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default:
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return 0; /* Should be unreachable. */
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}
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}
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void
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set_fpu_rounding_mode (int round)
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{
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unsigned int fpcr, round_mode;
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switch (round)
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{
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case GFC_FPE_TONEAREST:
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round_mode = FE_TONEAREST;
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break;
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case GFC_FPE_UPWARD:
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round_mode = FE_UPWARD;
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break;
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case GFC_FPE_DOWNWARD:
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round_mode = FE_DOWNWARD;
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break;
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case GFC_FPE_TOWARDZERO:
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round_mode = FE_TOWARDZERO;
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break;
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default:
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return; /* Should be unreachable. */
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}
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fpcr = __builtin_aarch64_get_fpcr();
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/* Only set FPCR if requested mode is different from current. */
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round_mode = (fpcr ^ round_mode) & FPCR_RM_MASK;
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if (round_mode != 0)
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__builtin_aarch64_set_fpcr(fpcr ^ round_mode);
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}
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int
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support_fpu_rounding_mode (int mode __attribute__((unused)))
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{
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return 1;
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}
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int
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support_fpu_underflow_control (int kind __attribute__((unused)))
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{
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/* Not supported for binary128. */
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return (kind == 4 || kind == 8) ? 1 : 0;
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}
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int
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get_fpu_underflow_mode (void)
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{
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unsigned int fpcr = __builtin_aarch64_get_fpcr();
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/* Return 0 for abrupt underflow (flush to zero), 1 for gradual underflow. */
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return (fpcr & FE_MAP_FZ) ? 0 : 1;
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}
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void
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set_fpu_underflow_mode (int gradual __attribute__((unused)))
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{
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unsigned int fpcr = __builtin_aarch64_get_fpcr();
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if (gradual)
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fpcr &= ~FE_MAP_FZ;
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else
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fpcr |= FE_MAP_FZ;
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__builtin_aarch64_set_fpcr(fpcr);
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}
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@ -39,17 +39,29 @@ if test "x${have_feenableexcept}" = "xyes"; then
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ieee_support='yes'
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fi
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# x86 asm should be used instead of glibc, since glibc doesn't support
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# the x86 denormal exception.
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case "${host_cpu}" in
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# x86 asm should be used instead of glibc, since glibc doesn't support
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# the x86 denormal exception.
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i?86 | x86_64)
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if test "x${have_soft_float}" = "xyes"; then
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fpu_host='fpu-generic'
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ieee_support='no'
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else
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fpu_host='fpu-387'
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ieee_support='yes'
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fi
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ieee_support='yes'
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;;
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# use asm on aarch64-darwin
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aarch64)
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case "${host_os}" in
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darwin*)
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fpu_host='fpu-aarch64'
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ieee_support='yes'
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;;
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esac
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esac
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# Some targets require additional compiler options for NaN/Inf.
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