i386: Add ISA check for newly introduced prefetch builtins.

Hi all,

As Hongtao said, the fail on pentiumpro is caused by missing ISA check
since we are using emit_insn () through new builtins and it won't check
if the TARGET matches. Previously, the builtin in middle-end will check
that.

On pentiumpro, we won't have anything that supports any prefetch so that
it dropped into the pattern and then failed.

I have added the restrictions just like what middle-end builtin_prefetch
does. Also I added missing checks for PREFETCHI. Ok for trunk?

BRs,
Haochen

gcc/ChangeLog:

	* config/i386/i386-builtin.def (BDESC): Add
	OPTION_MASK_ISA2_PREFETCHI for prefetchi builtin.
	* config/i386/i386-expand.cc (ix86_expand_builtin):
	Add ISA check before emit_insn.
	* config/i386/prfchiintrin.h: Add target for intrin.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/prefetchi-5.c: New test.
This commit is contained in:
Haochen Jiang 2022-11-09 14:02:31 +08:00
parent f225b813e4
commit 21de01f555
4 changed files with 27 additions and 4 deletions

View file

@ -498,7 +498,7 @@ BDESC (0, OPTION_MASK_ISA2_WIDEKL, CODE_FOR_nothing, "__builtin_ia32_aesencwide1
BDESC (0, OPTION_MASK_ISA2_WIDEKL, CODE_FOR_nothing, "__builtin_ia32_aesencwide256kl_u8", IX86_BUILTIN_AESENCWIDE256KLU8, UNKNOWN, (int) UINT8_FTYPE_PV2DI_PCV2DI_PCVOID)
/* PREFETCHI */
BDESC (0, 0, CODE_FOR_prefetchi, "__builtin_ia32_prefetchi", IX86_BUILTIN_PREFETCHI, UNKNOWN, (int) VOID_FTYPE_PCVOID_INT)
BDESC (0, OPTION_MASK_ISA2_PREFETCHI, CODE_FOR_prefetchi, "__builtin_ia32_prefetchi", IX86_BUILTIN_PREFETCHI, UNKNOWN, (int) VOID_FTYPE_PCVOID_INT)
BDESC (0, 0, CODE_FOR_nothing, "__builtin_ia32_prefetch", IX86_BUILTIN_PREFETCH, UNKNOWN, (int) VOID_FTYPE_PCVOID_INT_INT_INT)
BDESC_END (SPECIAL_ARGS, PURE_ARGS)

View file

@ -13133,7 +13133,7 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
if (INTVAL (op3) == 1)
{
if (TARGET_64BIT
if (TARGET_64BIT && TARGET_PREFETCHI
&& local_func_symbolic_operand (op0, GET_MODE (op0)))
emit_insn (gen_prefetchi (op0, op2));
else
@ -13152,7 +13152,14 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
op0 = convert_memory_address (Pmode, op0);
op0 = copy_addr_to_reg (op0);
}
emit_insn (gen_prefetch (op0, op1, op2));
if (TARGET_3DNOW || TARGET_PREFETCH_SSE
|| TARGET_PRFCHW || TARGET_PREFETCHWT1)
emit_insn (gen_prefetch (op0, op1, op2));
else if (!MEM_P (op0) && side_effects_p (op0))
/* Don't do anything with direct references to volatile memory,
but generate code to handle other side effects. */
emit_insn (op0);
}
return 0;

View file

@ -30,6 +30,13 @@
#ifdef __x86_64__
#ifndef __PREFETCHI__
#pragma GCC push_options
#pragma GCC target("prefetchi")
#define __DISABLE_PREFETCHI__
#endif /* __PREFETCHI__ */
extern __inline void
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_m_prefetchit0 (void* __P)
@ -44,6 +51,11 @@ _m_prefetchit1 (void* __P)
__builtin_ia32_prefetchi (__P, 2);
}
#endif
#ifdef __DISABLE_PREFETCHI__
#undef __DISABLE_PREFETCHI__
#pragma GCC pop_options
#endif /* __DISABLE_PREFETCHI__ */
#endif /* __x86_64__ */
#endif /* _PRFCHIINTRIN_H_INCLUDED */

View file

@ -0,0 +1,4 @@
/* { dg-do compile { target { ia32 } } } */
/* { dg-options "-O0 -march=pentiumpro" } */
#include "prefetchi-4.c"