AArch64: have -mcpu=native detect architecture extensions for unknown non-homogenous systems [PR113257]

in g:e91a17fe39c39e98cebe6e1cbc8064ee6846a3a7 we added the ability for
-mcpu=native on unknown CPUs to still enable architecture extensions.

This has worked great but was only added for homogenous systems.

However the same thing works for big.LITTLE as in such system the cores must
have the same extensions otherwise it doesn't fundamentally work.

i.e. task migration from one core to the other wouldn't work.

This extends the same handling to non-homogenous systems.

gcc/ChangeLog:

	PR target/113257
	* config/aarch64/driver-aarch64.cc (get_cpu_from_id, DEFAULT_CPU): New.
	(host_detect_local_cpu): Use it.

gcc/testsuite/ChangeLog:

	PR target/113257
	* gcc.target/aarch64/cpunative/info_34: New test.
	* gcc.target/aarch64/cpunative/native_cpu_34.c: New test.
	* gcc.target/aarch64/cpunative/info_35: New test.
	* gcc.target/aarch64/cpunative/native_cpu_35.c: New test.

Co-authored-by: Richard Sandiford <richard.sandiford@arm.com>

gcc/config/aarch64/driver-aarch64.cc

@@ -60,6 +60,7 @@ struct aarch64_core_data
 #define ALL_VARIANTS ((unsigned)-1)
 /* Default architecture to use if -mcpu=native did not detect a known CPU.  */
 #define DEFAULT_ARCH "8A"
+#define DEFAULT_CPU "generic-armv8-a"
 
 #define AARCH64_CORE(CORE_NAME, CORE_IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART, VARIANT) \
   { CORE_NAME, #ARCH, IMP, PART, VARIANT, feature_deps::cpu_##CORE_IDENT },
@@ -106,6 +107,19 @@ get_arch_from_id (const char* id)
   return NULL;
 }
 
+/* Return an aarch64_core_data for the cpu described
+   by ID, or NULL if ID describes something we don't know about.  */
+
+static const aarch64_core_data *
+get_cpu_from_id (const char* name)
+{
+  for (unsigned i = 0; aarch64_cpu_data[i].name != NULL; i++)
+    if (strcmp (name, aarch64_cpu_data[i].name) == 0)
+      return &aarch64_cpu_data[i];
+
+  return NULL;
+}
+
 /* Check wether the CORE array is the same as the big.LITTLE BL_CORE.
    For an example CORE={0xd08, 0xd03} and
    BL_CORE=AARCH64_BIG_LITTLE (0xd08, 0xd03) will return true.  */
@@ -403,18 +417,11 @@ host_detect_local_cpu (int argc, const char **argv)
                 || variants[0] == aarch64_cpu_data[i].variant))
 	  break;
 
-      if (aarch64_cpu_data[i].name == NULL)
+      if (arch)
 	{
-	  auto arch_info = get_arch_from_id (DEFAULT_ARCH);
-
-	  gcc_assert (arch_info);
-
-	  res = concat ("-march=", arch_info->name, NULL);
-	  default_flags = arch_info->flags;
-	}
-      else if (arch)
-	{
-	  const char *arch_id = aarch64_cpu_data[i].arch;
+	  const char *arch_id = (aarch64_cpu_data[i].name
+				 ? aarch64_cpu_data[i].arch
+				 : DEFAULT_ARCH);
 	  auto arch_info = get_arch_from_id (arch_id);
 
 	  /* We got some arch indentifier that's not in aarch64-arches.def?  */
@@ -424,12 +431,15 @@ host_detect_local_cpu (int argc, const char **argv)
 	  res = concat ("-march=", arch_info->name, NULL);
 	  default_flags = arch_info->flags;
 	}
-      else
+      else if (cpu || aarch64_cpu_data[i].name)
 	{
-	  default_flags = aarch64_cpu_data[i].flags;
+	  auto cpu_info = (aarch64_cpu_data[i].name
+			   ? &aarch64_cpu_data[i]
+			   : get_cpu_from_id (DEFAULT_CPU));
+	  default_flags = cpu_info->flags;
 	  res = concat ("-m",
 			cpu ? "cpu" : "tune", "=",
-			aarch64_cpu_data[i].name,
+			cpu_info->name,
 			NULL);
 	}
     }
@@ -449,6 +459,20 @@ host_detect_local_cpu (int argc, const char **argv)
 	      break;
 	    }
 	}
+
+      /* On big.LITTLE if we find any unknown CPUs we can still pick arch
+	 features as the cores should have the same features.  So just pick
+	 the feature flags from any of the cpus.  */
+      if (cpu && aarch64_cpu_data[i].name == NULL)
+	{
+	  auto cpu_info = get_cpu_from_id (DEFAULT_CPU);
+
+	  gcc_assert (cpu_info);
+
+	  res = concat ("-mcpu=", cpu_info->name, NULL);
+	  default_flags = cpu_info->flags;
+	}
+
       if (!res)
 	goto not_found;
     }

gcc/testsuite/gcc.target/aarch64/cpunative/info_34

@@ -0,0 +1,18 @@
+processor	: 0
+BogoMIPS	: 100.00
+Features	: fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp sve sve2 fphp asimdhp fcma
+CPU implementer	: 0xfe
+CPU architecture: 8
+CPU variant	: 0x0
+CPU part	: 0xd08
+CPU revision	: 2
+
+processor	: 0
+BogoMIPS	: 100.00
+Features	: fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp sve sve2 fphp asimdhp fcma
+CPU implementer	: 0xfe
+CPU architecture: 8
+CPU variant	: 0x0
+CPU part	: 0xd09
+CPU revision	: 2
+

gcc/testsuite/gcc.target/aarch64/cpunative/info_35

@@ -0,0 +1,18 @@
+processor	: 0
+BogoMIPS	: 100.00
+Features	: fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp sve sve2 fphp asimdhp fcma
+CPU implementer	: 0xfe
+CPU architecture: 8
+CPU variant	: 0x0
+CPU part	: 0xd08
+CPU revision	: 2
+
+processor	: 0
+BogoMIPS	: 100.00
+Features	: fp asimd evtstrm aes pmull sha1 sha2 crc32 asimddp sve sve2 fphp asimdhp fcma
+CPU implementer	: 0xfe
+CPU architecture: 8
+CPU variant	: 0x0
+CPU part	: 0xd09
+CPU revision	: 2
+

gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_34.c

@@ -0,0 +1,12 @@
+/* { dg-do compile { target { { aarch64*-*-linux*} && native } } } */
+/* { dg-set-compiler-env-var GCC_CPUINFO "$srcdir/gcc.target/aarch64/cpunative/info_34" } */
+/* { dg-additional-options "-mcpu=native" } */
+
+int main()
+{
+  return 0;
+}
+
+/* { dg-final { scan-assembler {\.arch armv8-a\+dotprod\+crc\+crypto\+sve2\n} } } */
+
+/* Test a normal looking procinfo.  */

gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_35.c

@@ -0,0 +1,13 @@
+/* { dg-do compile { target { { aarch64*-*-linux*} && native } } } */
+/* { dg-set-compiler-env-var GCC_CPUINFO "$srcdir/gcc.target/aarch64/cpunative/info_34" } */
+/* { dg-additional-options "-march=armv8.8-a+sve -mcpu=native" } */
+
+int main()
+{
+  return 0;
+}
+
+/* { dg-final { scan-assembler {\.arch armv8.8-a\+crc\+sve\n} } } */
+/* { dg-excess-errors "" } */
+
+/* Test a normal looking procinfo.  */