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loongarch: fix mulsidi3_64bit instruction

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(mult (sign_extend:DI rj:SI) (sign_extend:DI rk:SI)) should be
"mulw.d.w", not "mul.d".

gcc/ChangeLog:

	* config/loongarch/loongarch.md (mulsidi3_64bit): Use mulw.d.w
	instead of mul.d.

gcc/testsuite/ChangeLog:

	* gcc.target/loongarch/mulw_d_w.c: New test.
	* gcc.c-torture/execute/mul-sext.c: New test.
This commit is contained in:
Xi Ruoyao 2022-07-08 21:09:25 +08:00
parent aa2eb25c94
commit 1fa42d6214
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GPG key ID: ACAAD20E19E710E3
3 changed files with 31 additions and 1 deletions
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2
gcc/config/loongarch/loongarch.md
View file

@ -621,7 +621,7 @@
(mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r"))
(sign_extend:DI (match_operand:SI 2 "register_operand" "r"))))]
"TARGET_64BIT"
"mul.d\t%0,%1,%2"
"mulw.d.w\t%0,%1,%2"
[(set_attr "type" "imul")
(set_attr "mode" "DI")])

20
gcc/testsuite/gcc.c-torture/execute/mul-sext.c Normal file
View file

@ -0,0 +1,20 @@
/* { dg-do run } */
typedef __INT64_TYPE__ int64_t;
typedef __INT32_TYPE__ int32_t;
/* f() was misoptimized to a single "mul.d" instruction on LA64. */
__attribute__((noipa, noinline)) int64_t
f(int64_t a, int64_t b)
{
return (int64_t)(int32_t)a * (int64_t)(int32_t)b;
}
int
main()
{
int64_t a = 0x1145140000000001;
int64_t b = 0x1919810000000001;
if (f(a, b) != 1)
__builtin_abort();
}

10
gcc/testsuite/gcc.target/loongarch/mulw_d_w.c Normal file
View file

@ -0,0 +1,10 @@
/* { dg-do compile } */
/* { dg-options "-O2 -mabi=lp64d" } */
/* { dg-final { scan-assembler "mulw.d.w" } } */
/* This should be optimized to mulw.d.w for LA64. */
__attribute__((noipa, noinline)) long
f(long a, long b)
{
return (long)(int)a * (long)(int)b;
}