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i386.c (x86_fisttp): Remove.

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2006-09-20  Eric Christopher  <echristo@apple.com>

        * config/i386/i386.c (x86_fisttp): Remove.
        * config/i386/i386.h (x86_fisttp): Ditto.
        (TARGET_FISTTP): Ditto.

2006-09-20  Eric Christopher  <echristo@apple.com>

        * gcc.target/i386/sse3-not-fisttp.c: New.

From-SVN: r117076
This commit is contained in:
Eric Christopher 2006-09-20 08:11:19 +00:00 • committed by Eric Christopher
parent aac8697859
commit 1e993cb82d
5 changed files with 36 additions and 4 deletions
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6
gcc/ChangeLog
View file

@ -1,3 +1,9 @@
2006-09-20 Eric Christopher <echristo@apple.com>
* config/i386/i386.c (x86_fisttp): Remove.
* config/i386/i386.h (x86_fisttp): Ditto.
(TARGET_FISTTP): Ditto.
2006-09-19 Eric Christopher <echristo@apple.com>
* doc/tm.texi (OBJC_JBLEN): Describe.

1
gcc/config/i386/i386.c
View file

@ -743,7 +743,6 @@ const int x86_double_with_add = ~m_386;
const int x86_use_bit_test = m_386;
const int x86_unroll_strlen = m_486 | m_PENT | m_PPRO | m_ATHLON_K8 | m_K6 | m_GENERIC;
const int x86_cmove = m_PPRO | m_ATHLON_K8 | m_PENT4 | m_NOCONA;
const int x86_fisttp = m_NOCONA;
const int x86_3dnow_a = m_ATHLON_K8;
const int x86_deep_branch = m_PPRO | m_K6 | m_ATHLON_K8 | m_PENT4 | m_NOCONA | m_GENERIC;
/* Branch hints were put in P4 based on simulation result. But

5
gcc/config/i386/i386.h
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@ -142,7 +142,7 @@ extern const struct processor_costs *ix86_cost;
#define TUNEMASK (1 << ix86_tune)
extern const int x86_use_leave, x86_push_memory, x86_zero_extend_with_and;
extern const int x86_use_bit_test, x86_cmove, x86_fisttp, x86_deep_branch;
extern const int x86_use_bit_test, x86_cmove, x86_deep_branch;
extern const int x86_branch_hints, x86_unroll_strlen;
extern const int x86_double_with_add, x86_partial_reg_stall, x86_movx;
extern const int x86_use_himode_fiop, x86_use_simode_fiop;
@ -175,8 +175,7 @@ extern int x86_prefetch_sse;
/* For sane SSE instruction set generation we need fcomi instruction. It is
safe to enable all CMOVE instructions. */
#define TARGET_CMOVE ((x86_cmove & (1 << ix86_arch)) || TARGET_SSE)
#define TARGET_FISTTP (((x86_fisttp & (1 << ix86_arch)) || TARGET_SSE3) \
&& TARGET_80387)
#define TARGET_FISTTP (TARGET_SSE3 && TARGET_80387)
#define TARGET_DEEP_BRANCH_PREDICTION (x86_deep_branch & TUNEMASK)
#define TARGET_BRANCH_PREDICTION_HINTS (x86_branch_hints & TUNEMASK)
#define TARGET_DOUBLE_WITH_ADD (x86_double_with_add & TUNEMASK)

4
gcc/testsuite/ChangeLog
View file

@ -1,3 +1,7 @@
2006-09-20 Eric Christopher <echristo@apple.com>
* gcc.target/i386/sse3-not-fisttp.c: New.
2006-09-19 Jack Howarth <howarth@bromo.med.uc.edu>
* gfortran.dg/vect/vect-5.f90: Don't xfail lp64.

24
gcc/testsuite/gcc.target/i386/sse3-not-fisttp.c Normal file
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@ -0,0 +1,24 @@
/* Test that we don't generate a fisttp instruction when -mno-sse3. */
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
/* { dg-options "-O -march=nocona -mno-sse3" } */
/* { dg-final { scan-assembler-not "fisttp" } } */
struct foo
{
long a;
long b;
};
extern double c;
extern unsigned long long baz (void);
int
walrus (const struct foo *input)
{
unsigned long long d;
d = baz ()
+ (unsigned long long) (((double) input->a * 1000000000
+ (double) input->b) * c);
return (d ? 1 : 0);
}