c4x.md (UNSPEC_BU): New constants.
* config/c4x/c4x.md (UNSPEC_BU): New constants. (UNSPEC_RPTS, UNSPEC_LSH, UNSPEC_CMPHI, UNSPEC_RCPF): Likewise. (UNSPEC_RND, UNSPEC_RPTB_FILL, UNSPEC_LOADHF_INT): Likewise. (UNSPEC_STOREHF_INT, UNSPEC_RSQRF, UNSPEC_LOADQF_INT): Likewise. (UNSPEC_STOREQF_INT, UNSPEC_LDIV, UNSPEC_PUSH_ST): Likewise. (UNSPEC_POP_ST, UNSPEC_PUSH_DP, UNSPEC_POP_DP): Likewise. (UNSPEC_POPQI, UNSPEC_POPQF, UNSPEC_ANDN_ST): Likewise. (UNSPEC_RPTB_INIT, UNSPEC_TOIEEE, UNSPEC_FRIEEE): Likewise. From-SVN: r61754
This commit is contained in:
Michael Hayes
parent
e5c81eff2e
commit
1e4c04e02a
2 changed files with 94 additions and 76 deletions
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@ -1,6 +1,17 @@
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2003-01-25 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
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* config/c4x/c4x.md (UNSPEC_BU): New constants.
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(UNSPEC_RPTS, UNSPEC_LSH, UNSPEC_CMPHI, UNSPEC_RCPF): Likewise.
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(UNSPEC_RND, UNSPEC_RPTB_FILL, UNSPEC_LOADHF_INT): Likewise.
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(UNSPEC_STOREHF_INT, UNSPEC_RSQRF, UNSPEC_LOADQF_INT): Likewise.
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(UNSPEC_STOREQF_INT, UNSPEC_LDIV, UNSPEC_PUSH_ST): Likewise.
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(UNSPEC_POP_ST, UNSPEC_PUSH_DP, UNSPEC_POP_DP): Likewise.
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(UNSPEC_POPQI, UNSPEC_POPQF, UNSPEC_ANDN_ST): Likewise.
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(UNSPEC_RPTB_INIT, UNSPEC_TOIEEE, UNSPEC_FRIEEE): Likewise.
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Fri Jan 24 23:44:12 CET 2003 Jan Hubicka <jh@suse.cz>
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* emit-rtl.c (reg_attrs_htab): New static variable.
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: New static variable.
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(reg_attrs_htab_hash, reg_attrs_htab_eq, get_reg_attrs): New static
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functions.
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(reg_rtx): Do not maintain regno_decl.
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@ -446,29 +446,32 @@
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;
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; C4x UNSPEC NUMBERS
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;
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; 1 BU/BUD
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; 2 RPTS
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; 3 LSH
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; 4 cmphi
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; 5 RCPF
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; 6 RND
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; 7 repeat block filler
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; 8 loadhf_int
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; 9 storehf_int
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; 10 RSQRF
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; 11 loadqf_int
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; 12 storeqf_int
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; 13 Conditional load on overflow
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; 14 push_st
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; 15 pop_st
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; 16 push_dp
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; 17 pop_dp
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; 18 popqi_unspec
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; 19 popqf_unspec
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; 20 andn_st
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; 22 rptb_init
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; 23 toieee
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; 24 frieee
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(define_constants
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[
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(UNSPEC_BU 1)
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(UNSPEC_RPTS 2)
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(UNSPEC_LSH 3)
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(UNSPEC_CMPHI 4)
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(UNSPEC_RCPF 5)
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(UNSPEC_RND 6)
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(UNSPEC_RPTB_FILL 7)
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(UNSPEC_LOADHF_INT 8)
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(UNSPEC_STOREHF_INT 9)
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(UNSPEC_RSQRF 10)
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(UNSPEC_LOADQF_INT 11)
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(UNSPEC_STOREQF_INT 12)
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(UNSPEC_LDIV 13)
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(UNSPEC_PUSH_ST 14)
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(UNSPEC_POP_ST 15)
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(UNSPEC_PUSH_DP 16)
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(UNSPEC_POP_DP 17)
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(UNSPEC_POPQI 18)
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(UNSPEC_POPQF 19)
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(UNSPEC_ANDN_ST 20)
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(UNSPEC_RPTB_INIT 22)
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(UNSPEC_TOIEEE 23)
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(UNSPEC_FRIEEE 24)
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])
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;
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; C4x FUNCTIONAL UNITS
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@ -1414,14 +1417,16 @@
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[(set_attr "type" "push")])
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(define_insn "push_st"
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[(set (mem:QI (pre_inc:QI (reg:QI 20))) (unspec:QI [(reg:QI 21)] 14))
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[(set (mem:QI (pre_inc:QI (reg:QI 20)))
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(unspec:QI [(reg:QI 21)] UNSPEC_PUSH_ST))
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(use (reg:QI 21))]
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""
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"push\\tst"
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[(set_attr "type" "push")])
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(define_insn "push_dp"
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[(set (mem:QI (pre_inc:QI (reg:QI 20))) (unspec:QI [(reg:QI 16)] 16))
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[(set (mem:QI (pre_inc:QI (reg:QI 20)))
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(unspec:QI [(reg:QI 16)] UNSPEC_PUSH_DP))
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(use (reg:QI 16))]
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""
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"push\\tdp"
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@ -1436,21 +1441,23 @@
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[(set_attr "type" "pop")])
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(define_insn "pop_st"
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[(set (unspec:QI [(reg:QI 21)] 15) (mem:QI (post_dec:QI (reg:QI 20))))
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[(set (unspec:QI [(reg:QI 21)] UNSPEC_POP_ST)
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(mem:QI (post_dec:QI (reg:QI 20))))
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(clobber (reg:CC 21))]
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""
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"pop\\tst"
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[(set_attr "type" "pop")])
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(define_insn "pop_dp"
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[(set (unspec:QI [(reg:QI 16)] 17) (mem:QI (post_dec:QI (reg:QI 20))))
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[(set (unspec:QI [(reg:QI 16)] UNSPEC_POP_DP)
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(mem:QI (post_dec:QI (reg:QI 20))))
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(clobber (reg:CC 16))]
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""
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"pop\\tdp"
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[(set_attr "type" "pop")])
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(define_insn "popqi_unspec"
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[(set (unspec:QI [(match_operand:QI 0 "reg_operand" "=r")] 18)
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[(set (unspec:QI [(match_operand:QI 0 "reg_operand" "=r")] UNSPEC_POPQI)
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(mem:QI (post_dec:QI (reg:QI 20))))
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(clobber (match_dup 0))
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(clobber (reg:CC 21))]
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@ -2489,7 +2496,7 @@
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(define_insn "andn_st"
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[(set (unspec:QI [(reg:QI 21)] 20)
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(and:QI (unspec:QI [(reg:QI 21)] 20)
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(and:QI (unspec:QI [(reg:QI 21)] UNSPEC_ANDN_ST)
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(match_operand:QI 0 "" "N")))
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(use (match_dup 0))
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(use (reg:CC 21))
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@ -2890,7 +2897,7 @@
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(define_insn "*lshlqi3_clobber"
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[(set (match_operand:QI 0 "reg_operand" "=d,d,?d,c,c,?c")
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(ashift:QI (match_operand:QI 1 "src_operand" "0,rR,rS<>,0,rR,rS<>")
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(unspec:QI [(match_operand:QI 2 "src_operand" "rIm,JR,rS<>,rIm,JR,rS<>")] 3)))
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(unspec:QI [(match_operand:QI 2 "src_operand" "rIm,JR,rS<>,rIm,JR,rS<>")] UNSPEC_LSH)))
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(clobber (reg:CC 21))]
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"valid_operands (ASHIFT, operands, QImode)"
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"@
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@ -3425,7 +3432,7 @@
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; This can generate invalid stack slot displacements
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(define_split
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[(set (match_operand:QI 0 "reg_operand" "")
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(unspec:QI [(match_operand:QF 1 "reg_operand" "")] 12))]
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(unspec:QI [(match_operand:QF 1 "reg_operand" "")] UNSPEC_STOREQF_INT))]
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"reload_completed"
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[(set (match_dup 3) (match_dup 1))
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(set (match_dup 0) (match_dup 2))]
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@ -3436,14 +3443,14 @@
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(define_insn "storeqf_int"
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[(set (match_operand:QI 0 "reg_operand" "=r")
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(unspec:QI [(match_operand:QF 1 "reg_operand" "f")] 12))]
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(unspec:QI [(match_operand:QF 1 "reg_operand" "f")] UNSPEC_STOREQF_INT))]
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""
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"#"
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[(set_attr "type" "multi")])
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(define_split
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[(parallel [(set (match_operand:QI 0 "reg_operand" "")
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(unspec:QI [(match_operand:QF 1 "reg_operand" "")] 12))
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(unspec:QI [(match_operand:QF 1 "reg_operand" "")] UNSPEC_STOREQF_INT))
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(clobber (reg:CC 21))])]
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"reload_completed"
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[(set (mem:QF (pre_inc:QI (reg:QI 20)))
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@ -3468,7 +3475,7 @@
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(define_insn "storeqf_int_clobber"
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[(parallel [(set (match_operand:QI 0 "reg_operand" "=r")
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(unspec:QI [(match_operand:QF 1 "reg_operand" "f")] 12))
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(unspec:QI [(match_operand:QF 1 "reg_operand" "f")] UNSPEC_STOREQF_INT))
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(clobber (reg:CC 21))])]
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""
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"#"
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@ -3478,7 +3485,7 @@
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; This can generate invalid stack slot displacements
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(define_split
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[(set (match_operand:QF 0 "reg_operand" "")
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(unspec:QF [(match_operand:QI 1 "reg_operand" "")] 11))]
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(unspec:QF [(match_operand:QI 1 "reg_operand" "")] UNSPEC_LOADQF_INT))]
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"reload_completed"
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[(set (match_dup 2) (match_dup 1))
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(set (match_dup 0) (match_dup 3))]
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@ -3489,14 +3496,14 @@
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(define_insn "loadqf_int"
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[(set (match_operand:QF 0 "reg_operand" "=f")
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(unspec:QF [(match_operand:QI 1 "reg_operand" "r")] 11))]
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(unspec:QF [(match_operand:QI 1 "reg_operand" "r")] UNSPEC_LOADQF_INT))]
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""
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"#"
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[(set_attr "type" "multi")])
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(define_split
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[(parallel [(set (match_operand:QF 0 "reg_operand" "")
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(unspec:QF [(match_operand:QI 1 "reg_operand" "")] 11))
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(unspec:QF [(match_operand:QI 1 "reg_operand" "")] UNSPEC_LOADQF_INT))
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(clobber (reg:CC 21))])]
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"reload_completed"
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[(set (mem:QI (pre_inc:QI (reg:QI 20)))
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@ -3508,7 +3515,7 @@
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(define_insn "loadqf_int_clobber"
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[(parallel [(set (match_operand:QF 0 "reg_operand" "=f")
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(unspec:QF [(match_operand:QI 1 "reg_operand" "r")] 11))
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(unspec:QF [(match_operand:QI 1 "reg_operand" "r")] UNSPEC_LOADQF_INT))
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(clobber (reg:CC 21))])]
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""
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"#"
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@ -3586,7 +3593,7 @@
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[(set_attr "type" "pop")])
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(define_insn "popqf_unspec"
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[(set (unspec:QF [(match_operand:QF 0 "reg_operand" "=f")] 19)
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[(set (unspec:QF [(match_operand:QF 0 "reg_operand" "=f")] UNSPEC_POPQF)
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(mem:QF (post_dec:QI (reg:QI 20))))
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(clobber (match_dup 0))
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(clobber (reg:CC 21))]
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@ -3867,7 +3874,7 @@
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(const_int 0)))
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(set (match_dup 4)
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(fix:QI (match_dup 3)))])
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(parallel [(set (match_dup 4) (unspec:QI [(match_dup 2)] 13))
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(parallel [(set (match_dup 4) (unspec:QI [(match_dup 2)] UNSPEC_LDIV))
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(use (reg:CC 21))])
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(set (match_operand:QI 0 "reg_operand" "=r") (match_dup 4))]
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""
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@ -3889,7 +3896,7 @@
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(const_int 0)))
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(set (match_dup 4)
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(fix:QI (match_dup 3)))])
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(parallel [(set (match_dup 4) (unspec:QI [(match_dup 2)] 13))
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(parallel [(set (match_dup 4) (unspec:QI [(match_dup 2)] UNSPEC_LDIV))
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(use (reg:CC 21))])
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(set (match_operand:QI 0 "reg_operand" "=r") (match_dup 4))]
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""
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@ -3913,7 +3920,7 @@
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;
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(define_insn "rcpfqf_clobber"
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[(set (match_operand:QF 0 "reg_operand" "=f")
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(unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] 5))
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(unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] UNSPEC_RCPF))
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(clobber (reg:CC_NOOV 21))]
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"! TARGET_C3X"
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"rcpf\\t%1,%0"
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@ -3924,7 +3931,7 @@
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;
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(define_insn "*rsqrfqf_clobber"
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[(set (match_operand:QF 0 "reg_operand" "=f")
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(unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] 10))
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(unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] UNSPEC_RSQRF))
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(clobber (reg:CC_NOOV 21))]
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"! TARGET_C3X"
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"rsqrf\\t%1,%0"
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@ -3935,7 +3942,7 @@
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;
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(define_insn "*rndqf_clobber"
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[(set (match_operand:QF 0 "reg_operand" "=f")
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(unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] 6))
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(unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] UNSPEC_RND))
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(clobber (reg:CC_NOOV 21))]
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"! TARGET_C3X"
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"rnd\\t%1,%0"
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@ -3945,7 +3952,7 @@
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; Inlined float square root for C4x
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(define_expand "sqrtqf2_inline"
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[(parallel [(set (match_dup 2)
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(unspec:QF [(match_operand:QF 1 "src_operand" "")] 10))
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(unspec:QF [(match_operand:QF 1 "src_operand" "")] UNSPEC_RSQRF))
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(clobber (reg:CC_NOOV 21))])
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(parallel [(set (match_dup 3) (mult:QF (match_dup 5) (match_dup 1)))
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(clobber (reg:CC_NOOV 21))])
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@ -3968,7 +3975,7 @@
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(parallel [(set (match_dup 4) (mult:QF (match_dup 2) (match_dup 1)))
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(clobber (reg:CC_NOOV 21))])
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(parallel [(set (match_operand:QF 0 "reg_operand" "")
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(unspec:QF [(match_dup 4)] 6))
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(unspec:QF [(match_dup 4)] UNSPEC_RND))
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(clobber (reg:CC_NOOV 21))])]
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"! TARGET_C3X"
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"if (! reload_in_progress
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@ -3993,14 +4000,14 @@
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;
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(define_insn "toieee"
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[(set (match_operand:QF 0 "reg_operand" "=f")
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(unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] 23))
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(unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] UNSPEC_TOIEEE))
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(clobber (reg:CC 21))]
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""
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"toieee\\t%1,%0")
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(define_insn "frieee"
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[(set (match_operand:QF 0 "reg_operand" "=f")
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(unspec:QF [(match_operand:QF 1 "memory_operand" "m")] 24))
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(unspec:QF [(match_operand:QF 1 "memory_operand" "m")] UNSPEC_FRIEEE))
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(clobber (reg:CC 21))]
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""
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"frieee\\t%1,%0")
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@ -4203,7 +4210,7 @@
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; Inlined float divide for C4x
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(define_expand "divqf3_inline"
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[(parallel [(set (match_dup 3)
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(unspec:QF [(match_operand:QF 2 "src_operand" "")] 5))
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(unspec:QF [(match_operand:QF 2 "src_operand" "")] UNSPEC_RCPF))
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(clobber (reg:CC_NOOV 21))])
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(parallel [(set (match_dup 4) (mult:QF (match_dup 2) (match_dup 3)))
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(clobber (reg:CC_NOOV 21))])
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@ -4222,7 +4229,7 @@
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(match_dup 3)))
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(clobber (reg:CC_NOOV 21))])
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(parallel [(set (match_operand:QF 0 "reg_operand" "")
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(unspec:QF [(match_dup 3)] 6))
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(unspec:QF [(match_dup 3)] UNSPEC_RND))
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(clobber (reg:CC_NOOV 21))])]
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"! TARGET_C3X"
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"if (! reload_in_progress
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@ -4278,7 +4285,7 @@
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(define_insn "*ldi_on_overflow"
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[(set (match_operand:QI 0 "reg_operand" "=r")
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(unspec:QI [(match_operand:QI 1 "src_operand" "rIm")] 13))
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(unspec:QI [(match_operand:QI 1 "src_operand" "rIm")] UNSPEC_LDIV))
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(use (reg:CC 21))]
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""
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"ldiv\\t%1,%0"
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@ -4519,7 +4526,7 @@
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(define_insn "*bu"
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[(set (pc)
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(unspec [(match_operand:QI 0 "reg_operand" "r")] 1))]
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(unspec [(match_operand:QI 0 "reg_operand" "r")] UNSPEC_BU))]
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""
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"bu%#\\t%0"
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[(set_attr "type" "jump")])
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@ -4695,7 +4702,7 @@
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(define_insn "*toieee_movqf_clobber"
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[(set (match_operand:QF 0 "ext_low_reg_operand" "=q")
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(unspec:QF [(match_operand:QF 1 "par_ind_operand" "S<>")] 23))
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(unspec:QF [(match_operand:QF 1 "par_ind_operand" "S<>")] UNSPEC_TOIEEE))
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(set (match_operand:QF 2 "par_ind_operand" "=S<>")
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(match_operand:QF 3 "ext_low_reg_operand" "q"))
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(clobber (reg:CC 21))]
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@ -4709,7 +4716,7 @@
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|
||||
(define_insn "*frieee_movqf_clobber"
|
||||
[(set (match_operand:QF 0 "ext_low_reg_operand" "=q")
|
||||
(unspec:QF [(match_operand:QF 1 "par_ind_operand" "S<>")] 24))
|
||||
(unspec:QF [(match_operand:QF 1 "par_ind_operand" "S<>")] UNSPEC_FRIEEE))
|
||||
(set (match_operand:QF 2 "par_ind_operand" "=S<>")
|
||||
(match_operand:QF 3 "ext_low_reg_operand" "q"))
|
||||
(clobber (reg:CC 21))]
|
||||
|
|
@ -5504,7 +5511,7 @@
|
|||
|
||||
(define_insn "rpts_top"
|
||||
[(unspec [(use (label_ref (match_operand 0 "" "")))
|
||||
(use (label_ref (match_operand 1 "" "")))] 2)
|
||||
(use (label_ref (match_operand 1 "" "")))] UNSPEC_RPTS)
|
||||
(clobber (reg:QI 25))
|
||||
(clobber (reg:QI 26))]
|
||||
""
|
||||
|
|
@ -5517,7 +5524,7 @@
|
|||
; This pattern needs to be emitted at the start of the loop to
|
||||
; say that RS and RE are loaded.
|
||||
(define_insn "rptb_init"
|
||||
[(unspec [(match_operand:QI 0 "register_operand" "va")] 22)
|
||||
[(unspec [(match_operand:QI 0 "register_operand" "va")] UNSPEC_RPTB_INIT)
|
||||
(clobber (reg:QI 25))
|
||||
(clobber (reg:QI 26))]
|
||||
""
|
||||
|
|
@ -5893,7 +5900,7 @@
|
|||
"reload_completed"
|
||||
[(set (match_dup 0) (float_extend:HF (match_dup 2)))
|
||||
(set (match_dup 0) (unspec:HF [(subreg:QI (match_dup 0) 0)
|
||||
(match_dup 3)] 8))]
|
||||
(match_dup 3)] UNSPEC_LOADHF_INT))]
|
||||
"operands[2] = c4x_operand_subword (operands[1], 0, 1, HFmode);
|
||||
operands[3] = c4x_operand_subword (operands[1], 1, 1, HFmode);
|
||||
PUT_MODE (operands[2], QFmode);
|
||||
|
|
@ -5905,7 +5912,7 @@
|
|||
"reload_completed && 0"
|
||||
[(set (match_dup 0) (float_extend:HF (match_dup 2)))
|
||||
(set (match_dup 0) (unspec:HF [(subreg:QI (match_dup 0) 0)
|
||||
(match_dup 3)] 8))]
|
||||
(match_dup 3)] UNSPEC_LOADHF_INT))]
|
||||
"operands[2] = c4x_operand_subword (operands[1], 0, 1, HFmode);
|
||||
operands[3] = c4x_operand_subword (operands[1], 1, 1, HFmode);
|
||||
PUT_MODE (operands[2], QFmode);
|
||||
|
|
@ -5916,7 +5923,7 @@
|
|||
(match_operand:HF 1 "reg_operand" ""))]
|
||||
"reload_completed"
|
||||
[(set (match_dup 2) (float_truncate:QF (match_dup 1)))
|
||||
(set (match_dup 3) (unspec:QI [(match_dup 1)] 9))]
|
||||
(set (match_dup 3) (unspec:QI [(match_dup 1)] UNSPEC_STOREHF_INT))]
|
||||
"operands[2] = c4x_operand_subword (operands[0], 0, 1, HFmode);
|
||||
operands[3] = c4x_operand_subword (operands[0], 1, 1, HFmode);
|
||||
PUT_MODE (operands[2], QFmode);
|
||||
|
|
@ -5932,7 +5939,7 @@
|
|||
(define_insn "*loadhf_int"
|
||||
[(set (match_operand:HF 0 "reg_operand" "+h")
|
||||
(unspec:HF [(subreg:QI (match_dup 0) 0)
|
||||
(match_operand:QI 1 "src_operand" "rIm")] 8))]
|
||||
(match_operand:QI 1 "src_operand" "rIm")] UNSPEC_LOADHF_INT))]
|
||||
""
|
||||
"ldiu\\t%1,%0"
|
||||
[(set_attr "type" "unary")])
|
||||
|
|
@ -5946,7 +5953,7 @@
|
|||
|
||||
(define_insn "*storehf_int"
|
||||
[(set (match_operand:QI 0 "memory_operand" "=m")
|
||||
(unspec:QI [(match_operand:HF 1 "reg_operand" "h")] 9))]
|
||||
(unspec:QI [(match_operand:HF 1 "reg_operand" "h")] UNSPEC_STOREHF_INT))]
|
||||
""
|
||||
"sti\\t%1,%0"
|
||||
[(set_attr "type" "store")])
|
||||
|
|
@ -5983,7 +5990,7 @@
|
|||
[(set (mem:QF (pre_inc:QI (reg:QI 20)))
|
||||
(float_truncate:QF (match_dup 0)))
|
||||
(set (mem:QI (pre_inc:QI (reg:QI 20)))
|
||||
(unspec:QI [(match_dup 0)] 9))]
|
||||
(unspec:QI [(match_dup 0)] UNSPEC_STOREHF_INT))]
|
||||
"")
|
||||
|
||||
(define_insn "pushhf_trunc"
|
||||
|
|
@ -5995,7 +6002,7 @@
|
|||
|
||||
(define_insn "pushhf_int"
|
||||
[(set (mem:QI (pre_inc:QI (reg:QI 20)))
|
||||
(unspec:QI [(match_operand:HF 0 "reg_operand" "h")] 9))]
|
||||
(unspec:QI [(match_operand:HF 0 "reg_operand" "h")] UNSPEC_STOREHF_INT))]
|
||||
""
|
||||
"push\\t%0"
|
||||
[(set_attr "type" "push")])
|
||||
|
|
@ -6019,14 +6026,14 @@
|
|||
(clobber (reg:CC 21))])
|
||||
(parallel [(set (match_dup 0)
|
||||
(unspec:HF [(subreg:QI (match_dup 0) 0)
|
||||
(mem:QI (post_dec:QI (reg:QI 20)))] 8))
|
||||
(mem:QI (post_dec:QI (reg:QI 20)))] UNSPEC_LOADHF_INT))
|
||||
(clobber (reg:CC 21))])]
|
||||
"")
|
||||
|
||||
(define_insn "*pophf_int"
|
||||
[(set (match_operand:HF 0 "reg_operand" "+h")
|
||||
(unspec:HF [(subreg:QI (match_dup 0) 0)
|
||||
(mem:QI (post_dec:QI (reg:QI 20)))] 8))
|
||||
(mem:QI (post_dec:QI (reg:QI 20)))] UNSPEC_LOADHF_INT))
|
||||
(clobber (reg:CC 21))]
|
||||
""
|
||||
"pop\\t%0"
|
||||
|
|
@ -6131,7 +6138,7 @@
|
|||
;
|
||||
(define_insn "*rcpfhf_clobber"
|
||||
[(set (match_operand:HF 0 "reg_operand" "=h")
|
||||
(unspec:HF [(match_operand:HF 1 "reg_or_const_operand" "hH")] 5))
|
||||
(unspec:HF [(match_operand:HF 1 "reg_or_const_operand" "hH")] UNSPEC_RCPF))
|
||||
(clobber (reg:CC_NOOV 21))]
|
||||
"! TARGET_C3X"
|
||||
"rcpf\\t%1,%0"
|
||||
|
|
@ -6142,7 +6149,7 @@
|
|||
;
|
||||
(define_insn "*rsqrfhf_clobber"
|
||||
[(set (match_operand:HF 0 "reg_operand" "=h")
|
||||
(unspec:HF [(match_operand:HF 1 "reg_or_const_operand" "hH")] 10))
|
||||
(unspec:HF [(match_operand:HF 1 "reg_or_const_operand" "hH")] UNSPEC_RSQRF))
|
||||
(clobber (reg:CC_NOOV 21))]
|
||||
"! TARGET_C3X"
|
||||
"rsqrf\\t%1,%0"
|
||||
|
|
@ -6153,7 +6160,7 @@
|
|||
;
|
||||
(define_insn "*rndhf_clobber"
|
||||
[(set (match_operand:HF 0 "reg_operand" "=h")
|
||||
(unspec:HF [(match_operand:HF 1 "reg_or_const_operand" "hH")] 6))
|
||||
(unspec:HF [(match_operand:HF 1 "reg_or_const_operand" "hH")] UNSPEC_RND))
|
||||
(clobber (reg:CC_NOOV 21))]
|
||||
"! TARGET_C3X"
|
||||
"rnd\\t%1,%0"
|
||||
|
|
@ -6163,7 +6170,7 @@
|
|||
; Inlined float square root for C4x
|
||||
(define_expand "sqrthf2_inline"
|
||||
[(parallel [(set (match_dup 2)
|
||||
(unspec:HF [(match_operand:HF 1 "reg_operand" "")] 10))
|
||||
(unspec:HF [(match_operand:HF 1 "reg_operand" "")] UNSPEC_RSQRF))
|
||||
(clobber (reg:CC_NOOV 21))])
|
||||
(parallel [(set (match_dup 3) (mult:HF (match_dup 5) (match_dup 1)))
|
||||
(clobber (reg:CC_NOOV 21))])
|
||||
|
|
@ -6310,7 +6317,7 @@
|
|||
; Inlined float divide for C4x
|
||||
(define_expand "divhf3_inline"
|
||||
[(parallel [(set (match_dup 3)
|
||||
(unspec:HF [(match_operand:HF 2 "reg_operand" "")] 5))
|
||||
(unspec:HF [(match_operand:HF 2 "reg_operand" "")] UNSPEC_RCPF))
|
||||
(clobber (reg:CC_NOOV 21))])
|
||||
(parallel [(set (match_dup 4) (mult:HF (match_dup 2) (match_dup 3)))
|
||||
(clobber (reg:CC_NOOV 21))])
|
||||
|
|
@ -6886,7 +6893,7 @@
|
|||
/* If the shift count is greater than 32 this will do an arithmetic
|
||||
right shift. However, we need a logical right shift. */
|
||||
(parallel [(set (match_dup 9)
|
||||
(ashift:QI (match_dup 4) (unspec:QI [(match_dup 10)] 3)))
|
||||
(ashift:QI (match_dup 4) (unspec:QI [(match_dup 10)] UNSPEC_LSH)))
|
||||
(clobber (reg:CC 21))])
|
||||
(set (match_dup 6) (match_dup 8))
|
||||
(parallel [(set (match_dup 5)
|
||||
|
|
@ -7010,7 +7017,7 @@
|
|||
"! reload_completed"
|
||||
[(parallel [(set (reg:CC 21)
|
||||
(unspec:CC [(compare:CC (match_dup 0)
|
||||
(match_dup 1))] 4))
|
||||
(match_dup 1))] UNSPEC_CMPHI))
|
||||
(clobber (match_scratch:QI 2 ""))
|
||||
(clobber (match_scratch:QI 3 ""))])]
|
||||
"")
|
||||
|
|
@ -7022,7 +7029,7 @@
|
|||
"! reload_completed"
|
||||
[(parallel [(set (reg:CC_NOOV 21)
|
||||
(unspec:CC_NOOV [(compare:CC_NOOV (match_dup 0)
|
||||
(match_dup 1))] 4))
|
||||
(match_dup 1))] UNSPEC_CMPHI))
|
||||
(clobber (match_scratch:QI 2 ""))
|
||||
(clobber (match_scratch:QI 3 ""))])]
|
||||
"")
|
||||
|
|
@ -7154,7 +7161,7 @@
|
|||
(define_insn "cmphi_cc"
|
||||
[(set (reg:CC 21)
|
||||
(unspec:CC [(compare:CC (match_operand:HI 0 "src_operand" "rR,rS<>")
|
||||
(match_operand:HI 1 "src_operand" "R,rS<>"))] 4))
|
||||
(match_operand:HI 1 "src_operand" "R,rS<>"))] UNSPEC_CMPHI))
|
||||
(clobber (match_scratch:QI 2 "=&d,&d"))
|
||||
(clobber (match_scratch:QI 3 "=&c,&c"))]
|
||||
"valid_operands (COMPARE, operands, HImode)"
|
||||
|
|
@ -7170,7 +7177,7 @@
|
|||
(define_insn "cmphi_cc_noov"
|
||||
[(set (reg:CC_NOOV 21)
|
||||
(unspec:CC_NOOV [(compare:CC_NOOV (match_operand:HI 0 "src_operand" "rR,rS<>")
|
||||
(match_operand:HI 1 "src_operand" "R,rS<>"))] 4))
|
||||
(match_operand:HI 1 "src_operand" "R,rS<>"))] UNSPEC_CMPHI))
|
||||
(clobber (match_scratch:QI 2 "=&d,&d"))
|
||||
(clobber (match_scratch:QI 3 "=&c,&c"))]
|
||||
"valid_operands (COMPARE, operands, HImode)"
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue