Reimplement AArch64 TRN intrinsics with __builtin_shuffle.
gcc/testsuite/ChangeLog: * gcc.target/aarch64/vtrns32.c: Expect zip[12] insn rather than trn[12]. * gcc.target/aarch64/vtrnu32.c: Likewise. * gcc.target/aarch64/vtrnf32.c: Likewise. gcc/ChangeLog: * config/aarch64/arm_neon.h (vtrn1_f32, vtrn1_p8, vtrn1_p16, vtrn1_s8, vtrn1_s16, vtrn1_s32, vtrn1_u8, vtrn1_u16, vtrn1_u32, vtrn1q_f32, vtrn1q_f64, vtrn1q_p8, vtrn1q_p16, vtrn1q_s8, vtrn1q_s16, vtrn1q_s32, vtrn1q_s64, vtrn1q_u8, vtrn1q_u16, vtrn1q_u32, vtrn1q_u64, vtrn2_f32, vtrn2_p8, vtrn2_p16, vtrn2_s8, vtrn2_s16, vtrn2_s32, vtrn2_u8, vtrn2_u16, vtrn2_u32, vtrn2q_f32, vtrn2q_f64, vtrn2q_p8, vtrn2q_p16, vtrn2q_s8, vtrn2q_s16, vtrn2q_s32, vtrn2q_s64, vtrn2q_u8, vtrn2q_u16, vtrn2q_u32, vtrn2q_u64): Replace temporary asm with __builtin_shuffle. From-SVN: r210151
This commit is contained in:
Alan Lawrence
Alan Lawrence
parent
e2d87487ff
commit
1d175503d5
6 changed files with 455 additions and 468 deletions
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@ -1,3 +1,14 @@
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2014-05-07 Alan Lawrence <alan.lawrence@arm.com>
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* config/aarch64/arm_neon.h (vtrn1_f32, vtrn1_p8, vtrn1_p16, vtrn1_s8,
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vtrn1_s16, vtrn1_s32, vtrn1_u8, vtrn1_u16, vtrn1_u32, vtrn1q_f32,
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vtrn1q_f64, vtrn1q_p8, vtrn1q_p16, vtrn1q_s8, vtrn1q_s16, vtrn1q_s32,
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vtrn1q_s64, vtrn1q_u8, vtrn1q_u16, vtrn1q_u32, vtrn1q_u64, vtrn2_f32,
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vtrn2_p8, vtrn2_p16, vtrn2_s8, vtrn2_s16, vtrn2_s32, vtrn2_u8,
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vtrn2_u16, vtrn2_u32, vtrn2q_f32, vtrn2q_f64, vtrn2q_p8, vtrn2q_p16,
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vtrn2q_s8, vtrn2q_s16, vtrn2q_s32, vtrn2q_s64, vtrn2q_u8, vtrn2q_u16,
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vtrn2q_u32, vtrn2q_u64): Replace temporary asm with __builtin_shuffle.
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2014-05-07 Thomas Schwinge <thomas@codesourcery.com>
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* loop-unswitch.c: Delete.
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@ -12694,468 +12694,6 @@ vsubhn_u64 (uint64x2_t a, uint64x2_t b)
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return result;
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}
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__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
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vtrn1_f32 (float32x2_t a, float32x2_t b)
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{
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float32x2_t result;
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__asm__ ("trn1 %0.2s,%1.2s,%2.2s"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
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vtrn1_p8 (poly8x8_t a, poly8x8_t b)
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{
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poly8x8_t result;
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__asm__ ("trn1 %0.8b,%1.8b,%2.8b"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
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vtrn1_p16 (poly16x4_t a, poly16x4_t b)
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{
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poly16x4_t result;
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__asm__ ("trn1 %0.4h,%1.4h,%2.4h"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
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vtrn1_s8 (int8x8_t a, int8x8_t b)
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{
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int8x8_t result;
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__asm__ ("trn1 %0.8b,%1.8b,%2.8b"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
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vtrn1_s16 (int16x4_t a, int16x4_t b)
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{
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int16x4_t result;
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__asm__ ("trn1 %0.4h,%1.4h,%2.4h"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
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vtrn1_s32 (int32x2_t a, int32x2_t b)
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{
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int32x2_t result;
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__asm__ ("trn1 %0.2s,%1.2s,%2.2s"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
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vtrn1_u8 (uint8x8_t a, uint8x8_t b)
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{
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uint8x8_t result;
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__asm__ ("trn1 %0.8b,%1.8b,%2.8b"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
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vtrn1_u16 (uint16x4_t a, uint16x4_t b)
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{
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uint16x4_t result;
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__asm__ ("trn1 %0.4h,%1.4h,%2.4h"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
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vtrn1_u32 (uint32x2_t a, uint32x2_t b)
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{
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uint32x2_t result;
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__asm__ ("trn1 %0.2s,%1.2s,%2.2s"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
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vtrn1q_f32 (float32x4_t a, float32x4_t b)
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{
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float32x4_t result;
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__asm__ ("trn1 %0.4s,%1.4s,%2.4s"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline float64x2_t __attribute__ ((__always_inline__))
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vtrn1q_f64 (float64x2_t a, float64x2_t b)
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{
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float64x2_t result;
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__asm__ ("trn1 %0.2d,%1.2d,%2.2d"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
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vtrn1q_p8 (poly8x16_t a, poly8x16_t b)
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{
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poly8x16_t result;
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__asm__ ("trn1 %0.16b,%1.16b,%2.16b"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
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vtrn1q_p16 (poly16x8_t a, poly16x8_t b)
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{
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poly16x8_t result;
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__asm__ ("trn1 %0.8h,%1.8h,%2.8h"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
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vtrn1q_s8 (int8x16_t a, int8x16_t b)
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{
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int8x16_t result;
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__asm__ ("trn1 %0.16b,%1.16b,%2.16b"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
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vtrn1q_s16 (int16x8_t a, int16x8_t b)
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{
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int16x8_t result;
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__asm__ ("trn1 %0.8h,%1.8h,%2.8h"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
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vtrn1q_s32 (int32x4_t a, int32x4_t b)
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{
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int32x4_t result;
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__asm__ ("trn1 %0.4s,%1.4s,%2.4s"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
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vtrn1q_s64 (int64x2_t a, int64x2_t b)
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{
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int64x2_t result;
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__asm__ ("trn1 %0.2d,%1.2d,%2.2d"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
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vtrn1q_u8 (uint8x16_t a, uint8x16_t b)
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{
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uint8x16_t result;
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__asm__ ("trn1 %0.16b,%1.16b,%2.16b"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
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vtrn1q_u16 (uint16x8_t a, uint16x8_t b)
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{
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uint16x8_t result;
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__asm__ ("trn1 %0.8h,%1.8h,%2.8h"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
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vtrn1q_u32 (uint32x4_t a, uint32x4_t b)
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{
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uint32x4_t result;
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__asm__ ("trn1 %0.4s,%1.4s,%2.4s"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
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vtrn1q_u64 (uint64x2_t a, uint64x2_t b)
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{
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uint64x2_t result;
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__asm__ ("trn1 %0.2d,%1.2d,%2.2d"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
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vtrn2_f32 (float32x2_t a, float32x2_t b)
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{
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float32x2_t result;
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__asm__ ("trn2 %0.2s,%1.2s,%2.2s"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
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vtrn2_p8 (poly8x8_t a, poly8x8_t b)
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{
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poly8x8_t result;
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__asm__ ("trn2 %0.8b,%1.8b,%2.8b"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
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vtrn2_p16 (poly16x4_t a, poly16x4_t b)
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{
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poly16x4_t result;
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__asm__ ("trn2 %0.4h,%1.4h,%2.4h"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
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vtrn2_s8 (int8x8_t a, int8x8_t b)
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{
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int8x8_t result;
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__asm__ ("trn2 %0.8b,%1.8b,%2.8b"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
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vtrn2_s16 (int16x4_t a, int16x4_t b)
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{
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int16x4_t result;
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__asm__ ("trn2 %0.4h,%1.4h,%2.4h"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
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vtrn2_s32 (int32x2_t a, int32x2_t b)
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{
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int32x2_t result;
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__asm__ ("trn2 %0.2s,%1.2s,%2.2s"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
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vtrn2_u8 (uint8x8_t a, uint8x8_t b)
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{
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uint8x8_t result;
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__asm__ ("trn2 %0.8b,%1.8b,%2.8b"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
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vtrn2_u16 (uint16x4_t a, uint16x4_t b)
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{
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uint16x4_t result;
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__asm__ ("trn2 %0.4h,%1.4h,%2.4h"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
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vtrn2_u32 (uint32x2_t a, uint32x2_t b)
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{
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uint32x2_t result;
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__asm__ ("trn2 %0.2s,%1.2s,%2.2s"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
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vtrn2q_f32 (float32x4_t a, float32x4_t b)
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{
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float32x4_t result;
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__asm__ ("trn2 %0.4s,%1.4s,%2.4s"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline float64x2_t __attribute__ ((__always_inline__))
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vtrn2q_f64 (float64x2_t a, float64x2_t b)
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{
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float64x2_t result;
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__asm__ ("trn2 %0.2d,%1.2d,%2.2d"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
|
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return result;
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}
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__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
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vtrn2q_p8 (poly8x16_t a, poly8x16_t b)
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{
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poly8x16_t result;
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__asm__ ("trn2 %0.16b,%1.16b,%2.16b"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
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__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
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vtrn2q_p16 (poly16x8_t a, poly16x8_t b)
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{
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poly16x8_t result;
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__asm__ ("trn2 %0.8h,%1.8h,%2.8h"
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: "=w"(result)
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: "w"(a), "w"(b)
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: /* No clobbers */);
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return result;
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}
|
||||
|
||||
__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_s8 (int8x16_t a, int8x16_t b)
|
||||
{
|
||||
int8x16_t result;
|
||||
__asm__ ("trn2 %0.16b,%1.16b,%2.16b"
|
||||
: "=w"(result)
|
||||
: "w"(a), "w"(b)
|
||||
: /* No clobbers */);
|
||||
return result;
|
||||
}
|
||||
|
||||
__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_s16 (int16x8_t a, int16x8_t b)
|
||||
{
|
||||
int16x8_t result;
|
||||
__asm__ ("trn2 %0.8h,%1.8h,%2.8h"
|
||||
: "=w"(result)
|
||||
: "w"(a), "w"(b)
|
||||
: /* No clobbers */);
|
||||
return result;
|
||||
}
|
||||
|
||||
__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_s32 (int32x4_t a, int32x4_t b)
|
||||
{
|
||||
int32x4_t result;
|
||||
__asm__ ("trn2 %0.4s,%1.4s,%2.4s"
|
||||
: "=w"(result)
|
||||
: "w"(a), "w"(b)
|
||||
: /* No clobbers */);
|
||||
return result;
|
||||
}
|
||||
|
||||
__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_s64 (int64x2_t a, int64x2_t b)
|
||||
{
|
||||
int64x2_t result;
|
||||
__asm__ ("trn2 %0.2d,%1.2d,%2.2d"
|
||||
: "=w"(result)
|
||||
: "w"(a), "w"(b)
|
||||
: /* No clobbers */);
|
||||
return result;
|
||||
}
|
||||
|
||||
__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_u8 (uint8x16_t a, uint8x16_t b)
|
||||
{
|
||||
uint8x16_t result;
|
||||
__asm__ ("trn2 %0.16b,%1.16b,%2.16b"
|
||||
: "=w"(result)
|
||||
: "w"(a), "w"(b)
|
||||
: /* No clobbers */);
|
||||
return result;
|
||||
}
|
||||
|
||||
__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_u16 (uint16x8_t a, uint16x8_t b)
|
||||
{
|
||||
uint16x8_t result;
|
||||
__asm__ ("trn2 %0.8h,%1.8h,%2.8h"
|
||||
: "=w"(result)
|
||||
: "w"(a), "w"(b)
|
||||
: /* No clobbers */);
|
||||
return result;
|
||||
}
|
||||
|
||||
__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_u32 (uint32x4_t a, uint32x4_t b)
|
||||
{
|
||||
uint32x4_t result;
|
||||
__asm__ ("trn2 %0.4s,%1.4s,%2.4s"
|
||||
: "=w"(result)
|
||||
: "w"(a), "w"(b)
|
||||
: /* No clobbers */);
|
||||
return result;
|
||||
}
|
||||
|
||||
__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_u64 (uint64x2_t a, uint64x2_t b)
|
||||
{
|
||||
uint64x2_t result;
|
||||
__asm__ ("trn2 %0.2d,%1.2d,%2.2d"
|
||||
: "=w"(result)
|
||||
: "w"(a), "w"(b)
|
||||
: /* No clobbers */);
|
||||
return result;
|
||||
}
|
||||
|
||||
__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
|
||||
vtst_p8 (poly8x8_t a, poly8x8_t b)
|
||||
{
|
||||
|
|
@ -24454,6 +23992,438 @@ vtbx3_p8 (poly8x8_t __r, poly8x8x3_t __tab, uint8x8_t __idx)
|
|||
|
||||
/* vtrn */
|
||||
|
||||
__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
|
||||
vtrn1_f32 (float32x2_t __a, float32x2_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint32x2_t) {3, 1});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint32x2_t) {0, 2});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
|
||||
vtrn1_p8 (poly8x8_t __a, poly8x8_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint8x8_t) {9, 1, 11, 3, 13, 5, 15, 7});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint8x8_t) {0, 8, 2, 10, 4, 12, 6, 14});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
|
||||
vtrn1_p16 (poly16x4_t __a, poly16x4_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint16x4_t) {5, 1, 7, 3});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint16x4_t) {0, 4, 2, 6});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
|
||||
vtrn1_s8 (int8x8_t __a, int8x8_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint8x8_t) {9, 1, 11, 3, 13, 5, 15, 7});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint8x8_t) {0, 8, 2, 10, 4, 12, 6, 14});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
|
||||
vtrn1_s16 (int16x4_t __a, int16x4_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint16x4_t) {5, 1, 7, 3});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint16x4_t) {0, 4, 2, 6});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
|
||||
vtrn1_s32 (int32x2_t __a, int32x2_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint32x2_t) {3, 1});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint32x2_t) {0, 2});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
|
||||
vtrn1_u8 (uint8x8_t __a, uint8x8_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint8x8_t) {9, 1, 11, 3, 13, 5, 15, 7});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint8x8_t) {0, 8, 2, 10, 4, 12, 6, 14});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
|
||||
vtrn1_u16 (uint16x4_t __a, uint16x4_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint16x4_t) {5, 1, 7, 3});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint16x4_t) {0, 4, 2, 6});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
|
||||
vtrn1_u32 (uint32x2_t __a, uint32x2_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint32x2_t) {3, 1});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint32x2_t) {0, 2});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
|
||||
vtrn1q_f32 (float32x4_t __a, float32x4_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint32x4_t) {5, 1, 7, 3});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint32x4_t) {0, 4, 2, 6});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline float64x2_t __attribute__ ((__always_inline__))
|
||||
vtrn1q_f64 (float64x2_t __a, float64x2_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint64x2_t) {3, 1});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint64x2_t) {0, 2});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
|
||||
vtrn1q_p8 (poly8x16_t __a, poly8x16_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b,
|
||||
(uint8x16_t) {17, 1, 19, 3, 21, 5, 23, 7, 25, 9, 27, 11, 29, 13, 31, 15});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b,
|
||||
(uint8x16_t) {0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
|
||||
vtrn1q_p16 (poly16x8_t __a, poly16x8_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint16x8_t) {9, 1, 11, 3, 13, 5, 15, 7});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint16x8_t) {0, 8, 2, 10, 4, 12, 6, 14});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
|
||||
vtrn1q_s8 (int8x16_t __a, int8x16_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b,
|
||||
(uint8x16_t) {17, 1, 19, 3, 21, 5, 23, 7, 25, 9, 27, 11, 29, 13, 31, 15});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b,
|
||||
(uint8x16_t) {0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
|
||||
vtrn1q_s16 (int16x8_t __a, int16x8_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint16x8_t) {9, 1, 11, 3, 13, 5, 15, 7});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint16x8_t) {0, 8, 2, 10, 4, 12, 6, 14});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
|
||||
vtrn1q_s32 (int32x4_t __a, int32x4_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint32x4_t) {5, 1, 7, 3});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint32x4_t) {0, 4, 2, 6});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
|
||||
vtrn1q_s64 (int64x2_t __a, int64x2_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint64x2_t) {3, 1});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint64x2_t) {0, 2});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
|
||||
vtrn1q_u8 (uint8x16_t __a, uint8x16_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b,
|
||||
(uint8x16_t) {17, 1, 19, 3, 21, 5, 23, 7, 25, 9, 27, 11, 29, 13, 31, 15});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b,
|
||||
(uint8x16_t) {0, 16, 2, 18, 4, 20, 6, 22, 8, 24, 10, 26, 12, 28, 14, 30});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
|
||||
vtrn1q_u16 (uint16x8_t __a, uint16x8_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint16x8_t) {9, 1, 11, 3, 13, 5, 15, 7});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint16x8_t) {0, 8, 2, 10, 4, 12, 6, 14});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
|
||||
vtrn1q_u32 (uint32x4_t __a, uint32x4_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint32x4_t) {5, 1, 7, 3});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint32x4_t) {0, 4, 2, 6});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
|
||||
vtrn1q_u64 (uint64x2_t __a, uint64x2_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint64x2_t) {3, 1});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint64x2_t) {0, 2});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
|
||||
vtrn2_f32 (float32x2_t __a, float32x2_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint32x2_t) {2, 0});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint32x2_t) {1, 3});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
|
||||
vtrn2_p8 (poly8x8_t __a, poly8x8_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint8x8_t) {8, 0, 10, 2, 12, 4, 14, 6});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint8x8_t) {1, 9, 3, 11, 5, 13, 7, 15});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
|
||||
vtrn2_p16 (poly16x4_t __a, poly16x4_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint16x4_t) {4, 0, 6, 2});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint16x4_t) {1, 5, 3, 7});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
|
||||
vtrn2_s8 (int8x8_t __a, int8x8_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint8x8_t) {8, 0, 10, 2, 12, 4, 14, 6});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint8x8_t) {1, 9, 3, 11, 5, 13, 7, 15});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
|
||||
vtrn2_s16 (int16x4_t __a, int16x4_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint16x4_t) {4, 0, 6, 2});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint16x4_t) {1, 5, 3, 7});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
|
||||
vtrn2_s32 (int32x2_t __a, int32x2_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint32x2_t) {2, 0});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint32x2_t) {1, 3});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
|
||||
vtrn2_u8 (uint8x8_t __a, uint8x8_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint8x8_t) {8, 0, 10, 2, 12, 4, 14, 6});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint8x8_t) {1, 9, 3, 11, 5, 13, 7, 15});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
|
||||
vtrn2_u16 (uint16x4_t __a, uint16x4_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint16x4_t) {4, 0, 6, 2});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint16x4_t) {1, 5, 3, 7});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
|
||||
vtrn2_u32 (uint32x2_t __a, uint32x2_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint32x2_t) {2, 0});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint32x2_t) {1, 3});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_f32 (float32x4_t __a, float32x4_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint32x4_t) {4, 0, 6, 2});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint32x4_t) {1, 5, 3, 7});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline float64x2_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_f64 (float64x2_t __a, float64x2_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint64x2_t) {2, 0});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint64x2_t) {1, 3});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_p8 (poly8x16_t __a, poly8x16_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b,
|
||||
(uint8x16_t) {16, 0, 18, 2, 20, 4, 22, 6, 24, 8, 26, 10, 28, 12, 30, 14});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b,
|
||||
(uint8x16_t) {1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_p16 (poly16x8_t __a, poly16x8_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint16x8_t) {8, 0, 10, 2, 12, 4, 14, 6});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint16x8_t) {1, 9, 3, 11, 5, 13, 7, 15});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_s8 (int8x16_t __a, int8x16_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b,
|
||||
(uint8x16_t) {16, 0, 18, 2, 20, 4, 22, 6, 24, 8, 26, 10, 28, 12, 30, 14});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b,
|
||||
(uint8x16_t) {1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_s16 (int16x8_t __a, int16x8_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint16x8_t) {8, 0, 10, 2, 12, 4, 14, 6});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint16x8_t) {1, 9, 3, 11, 5, 13, 7, 15});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_s32 (int32x4_t __a, int32x4_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint32x4_t) {4, 0, 6, 2});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint32x4_t) {1, 5, 3, 7});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_s64 (int64x2_t __a, int64x2_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint64x2_t) {2, 0});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint64x2_t) {1, 3});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_u8 (uint8x16_t __a, uint8x16_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b,
|
||||
(uint8x16_t) {16, 0, 18, 2, 20, 4, 22, 6, 24, 8, 26, 10, 28, 12, 30, 14});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b,
|
||||
(uint8x16_t) {1, 17, 3, 19, 5, 21, 7, 23, 9, 25, 11, 27, 13, 29, 15, 31});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_u16 (uint16x8_t __a, uint16x8_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint16x8_t) {8, 0, 10, 2, 12, 4, 14, 6});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint16x8_t) {1, 9, 3, 11, 5, 13, 7, 15});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_u32 (uint32x4_t __a, uint32x4_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint32x4_t) {4, 0, 6, 2});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint32x4_t) {1, 5, 3, 7});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
|
||||
vtrn2q_u64 (uint64x2_t __a, uint64x2_t __b)
|
||||
{
|
||||
#ifdef __AARCH64EB__
|
||||
return __builtin_shuffle (__a, __b, (uint64x2_t) {2, 0});
|
||||
#else
|
||||
return __builtin_shuffle (__a, __b, (uint64x2_t) {1, 3});
|
||||
#endif
|
||||
}
|
||||
|
||||
__extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__))
|
||||
vtrn_f32 (float32x2_t a, float32x2_t b)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -1,3 +1,9 @@
|
|||
2014-05-07 Alan Lawrence <alan.lawrence@arm.com>
|
||||
|
||||
* gcc.target/aarch64/vtrns32.c: Expect zip[12] insn rather than trn[12].
|
||||
* gcc.target/aarch64/vtrnu32.c: Likewise.
|
||||
* gcc.target/aarch64/vtrnf32.c: Likewise.
|
||||
|
||||
2014-05-07 Alan Lawrence <alan.lawrence@arm.com>
|
||||
|
||||
* gcc.target/aarch64/simd/vtrnf32_1.c: New file.
|
||||
|
|
|
|||
|
|
@ -6,6 +6,6 @@
|
|||
#include <arm_neon.h>
|
||||
#include "vtrnf32.x"
|
||||
|
||||
/* { dg-final { scan-assembler-times "trn1\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "trn2\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
|
||||
/* { dg-final { cleanup-saved-temps } } */
|
||||
|
|
|
|||
|
|
@ -6,6 +6,6 @@
|
|||
#include <arm_neon.h>
|
||||
#include "vtrns32.x"
|
||||
|
||||
/* { dg-final { scan-assembler-times "trn1\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "trn2\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
|
||||
/* { dg-final { cleanup-saved-temps } } */
|
||||
|
|
|
|||
|
|
@ -6,6 +6,6 @@
|
|||
#include <arm_neon.h>
|
||||
#include "vtrnu32.x"
|
||||
|
||||
/* { dg-final { scan-assembler-times "trn1\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "trn2\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
|
||||
/* { dg-final { cleanup-saved-temps } } */
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue