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altivec.md (*altivec_lvxl_<mode>_internal): Output correct instruction.

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[gcc]

2016-02-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/altivec.md (*altivec_lvxl_<mode>_internal): Output
	correct instruction.

[gcc/testsuite]

2012-02-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc.target/powerpc/vec-cg.c: New test.

From-SVN: r233499
This commit is contained in:
Bill Schmidt 2016-02-17 16:23:55 +00:00 • committed by William Schmidt
parent 375374ad41
commit 1bed93e465
4 changed files with 32 additions and 1 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2016-02-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/altivec.md (*altivec_lvxl_<mode>_internal): Output
correct instruction.
2016-02-17 Richard Biener <rguenther@suse.de>
PR rtl-optimization/69609

2
gcc/config/rs6000/altivec.md
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@ -2511,7 +2511,7 @@
(match_operand:VM2 1 "memory_operand" "Z"))
(unspec [(const_int 0)] UNSPEC_SET_VSCR)])]
"TARGET_ALTIVEC"
"lvx %0,%y1"
"lvxl %0,%y1"
[(set_attr "type" "vecload")])
(define_expand "altivec_lvx_<mode>"

4
gcc/testsuite/ChangeLog
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@ -1,3 +1,7 @@
2012-02-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/vec-cg.c: New test.
2016-02-17 Richard Biener <rguenther@suse.de>
PR testsuite/69586

22
gcc/testsuite/gcc.target/powerpc/vec-cg.c Normal file
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@ -0,0 +1,22 @@
/* Test code generation of vector built-ins. We don't have this for
most of ours today. As new built-ins are added, please add to this
test case. Update as necessary to add VSX, P8-vector, P9-vector,
etc. */
/* { dg-do compile { target powerpc*-*-* } } */
/* { dg-require-effective-target powerpc_altivec_ok } */
/* { dg-options "-maltivec -O0" } */
#include <altivec.h>
static vector signed int i, *pi;
static int int1;
void
b()
{
i = __builtin_altivec_lvxl (int1, pi);
i = vec_lvxl (int1, pi);
}
/* { dg-final { scan-assembler-times "lvxl" 2 } } */