procyberian/gcc
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

s390: Support z17 processor name

Browse source 
The recently announced IBM z17 processor implements the architecture
already supported as arch15.  This patch adds support for z17 as an
alternative architecture name for arch15.

gcc/ChangeLog:

	* common/config/s390/s390-common.cc: Rename arch15 to z17.
	* config.gcc: Add z17.
	* config/s390/driver-native.cc: Detect z17 machine.
	* config/s390/s390-builtins.def (B_VXE3): Rename arch15 to z17.
	* config/s390/s390-c.cc (s390_resolve_overloaded_builtin): Ditto.
	* config/s390/s390-opts.h (enum processor_type): Ditto.
	* config/s390/s390.cc: Ditto.
	* config/s390/s390.h: Ditto.
	* config/s390/s390.md: Ditto.
	* config/s390/s390.opt: Add z17.
	* doc/invoke.texi: Ditto.
This commit is contained in:
Stefan Schulze Frielinghaus 2025-04-13 10:59:18 +02:00
parent 64319b2cca
commit 1b290c16e5
11 changed files with 49 additions and 42 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
gcc/common/config/s390/s390-common.cc
View file

@ -54,10 +54,10 @@ EXPORTED_CONST int processor_flags_table[] =
| PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196 | PF_ZEC12 | PF_TX
| PF_Z13 | PF_VX | PF_VXE | PF_Z14 | PF_VXE2 | PF_Z15
| PF_NNPA | PF_Z16,
/* arch15 */ PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
/* z17 */ PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
| PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196 | PF_ZEC12 | PF_TX
| PF_Z13 | PF_VX | PF_VXE | PF_Z14 | PF_VXE2 | PF_Z15
| PF_NNPA | PF_Z16 | PF_VXE3 | PF_ARCH15
| PF_NNPA | PF_Z16 | PF_VXE3 | PF_Z17
};
/* Change optimizations to be performed, depending on the

2
gcc/config.gcc
View file

@ -5756,7 +5756,7 @@ case "${target}" in
for which in arch tune; do
eval "val=\$with_$which"
case ${val} in
"" | native | z900 | z990 | z9-109 | z9-ec | z10 | z196 | zEC12 | z13 | z14 | z15 | z16 | arch5 | arch6 | arch7 | arch8 | arch9 | arch10 | arch11 | arch12 | arch13 | arch14 | arch15 )
"" | native | z900 | z990 | z9-109 | z9-ec | z10 | z196 | zEC12 | z13 | z14 | z15 | z16 | z17 | arch5 | arch6 | arch7 | arch8 | arch9 | arch10 | arch11 | arch12 | arch13 | arch14 | arch15 )
# OK
;;
*)

4
gcc/config/s390/driver-native.cc
View file

@ -127,6 +127,10 @@ s390_host_detect_local_cpu (int argc, const char **argv)
case 0x3932:
cpu = "arch14";
break;
case 0x9175:
case 0x9176:
cpu = "arch15";
break;
default:
cpu = "arch15";
break;

8
gcc/config/s390/s390-builtins.def
View file

@ -300,8 +300,8 @@
#define B_VXE2 (1 << 4) /* Builtins requiring the z15 vector extensions. */
#define B_DEP (1 << 5) /* Builtin has been deprecated and a warning should be issued. */
#define B_NNPA (1 << 6) /* Builtins requiring the NNPA Facility. */
#define B_VXE3 (1 << 7) /* Builtins requiring the arch15 vector extensions. */
#define B_ARCH15 (1 << 8) /* Builtins requiring arch15. */
#define B_VXE3 (1 << 7) /* Builtins requiring the z17 vector extensions. */
#define B_Z17 (1 << 8) /* Builtins requiring z17. */
/* B_DEF defines a standard (not overloaded) builtin
B_DEF (<builtin name>, <RTL expander name>, <function attributes>, <builtin flags>, <operand flags, see above>, <fntype>)
@ -3318,8 +3318,8 @@ B_DEF (s390_vcnf, vcnf_v8hi, 0,
/* arch 15 builtins */
B_DEF (s390_bdepg, bdepg, 0, B_ARCH15, 0, BT_FN_ULONG_ULONG_ULONG)
B_DEF (s390_bextg, bextg, 0, B_ARCH15, 0, BT_FN_ULONG_ULONG_ULONG)
B_DEF (s390_bdepg, bdepg, 0, B_Z17, 0, BT_FN_ULONG_ULONG_ULONG)
B_DEF (s390_bextg, bextg, 0, B_Z17, 0, BT_FN_ULONG_ULONG_ULONG)
OB_DEF (s390_vec_blend, s390_vec_blend_s8, s390_vec_blend_dbl, B_VXE3, BT_FN_OV4SI_OV4SI_OV4SI_OV4SI)
OB_DEF_VAR (s390_vec_blend_s8, s390_vblendb, 0, 0, BT_OV_V16QI_V16QI_V16QI_V16QI)

4
gcc/config/s390/s390-c.cc
View file

@ -962,7 +962,7 @@ s390_resolve_overloaded_builtin (location_t loc, tree ob_fndecl,
if (!TARGET_VXE3 && (ob_flags & B_VXE3))
{
error_at (loc, "%qF requires arch15 or higher", ob_fndecl);
error_at (loc, "%qF requires z17 or higher", ob_fndecl);
return error_mark_node;
}
@ -1056,7 +1056,7 @@ s390_resolve_overloaded_builtin (location_t loc, tree ob_fndecl,
if (!TARGET_VXE3
&& bflags_overloaded_builtin_var[last_match_index] & B_VXE3)
{
error_at (loc, "%qs matching variant requires arch15 or higher",
error_at (loc, "%qs matching variant requires z17 or higher",
IDENTIFIER_POINTER (DECL_NAME (ob_fndecl)));
return error_mark_node;
}

2
gcc/config/s390/s390-opts.h
View file

@ -39,7 +39,7 @@ enum processor_type
PROCESSOR_3906_Z14,
PROCESSOR_8561_Z15,
PROCESSOR_3931_Z16,
PROCESSOR_ARCH15,
PROCESSOR_9175_Z17,
PROCESSOR_NATIVE,
PROCESSOR_max
};

10
gcc/config/s390/s390.cc
View file

@ -342,7 +342,7 @@ const struct s390_processor processor_table[] =
{ "z14", "arch12", PROCESSOR_3906_Z14, &zEC12_cost, 12 },
{ "z15", "arch13", PROCESSOR_8561_Z15, &zEC12_cost, 13 },
{ "z16", "arch14", PROCESSOR_3931_Z16, &zEC12_cost, 14 },
{ "arch15", "arch15", PROCESSOR_ARCH15, &zEC12_cost, 15 },
{ "z17", "arch15", PROCESSOR_9175_Z17, &zEC12_cost, 15 },
{ "native", "", PROCESSOR_NATIVE, NULL, 0 }
};
@ -916,7 +916,7 @@ s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
if ((bflags & B_VXE3) && !TARGET_VXE3)
{
error ("Builtin %qF requires arch15 or higher", fndecl);
error ("Builtin %qF requires z17 or higher", fndecl);
return const0_rtx;
}
}
@ -9204,7 +9204,7 @@ s390_issue_rate (void)
case PROCESSOR_3906_Z14:
case PROCESSOR_8561_Z15:
case PROCESSOR_3931_Z16:
case PROCESSOR_ARCH15:
case PROCESSOR_9175_Z17:
default:
return 1;
}
@ -15632,7 +15632,7 @@ s390_get_sched_attrmask (rtx_insn *insn)
mask |= S390_SCHED_ATTR_MASK_GROUPOFTWO;
break;
case PROCESSOR_3931_Z16:
case PROCESSOR_ARCH15:
case PROCESSOR_9175_Z17:
if (get_attr_z16_cracked (insn))
mask |= S390_SCHED_ATTR_MASK_CRACKED;
if (get_attr_z16_expanded (insn))
@ -15691,7 +15691,7 @@ s390_get_unit_mask (rtx_insn *insn, int *units)
mask |= 1 << 3;
break;
case PROCESSOR_3931_Z16:
case PROCESSOR_ARCH15:
case PROCESSOR_9175_Z17:
*units = 4;
if (get_attr_z16_unit_lsu (insn))
mask |= 1 << 0;

16
gcc/config/s390/s390.h
View file

@ -45,7 +45,7 @@ enum processor_flags
PF_NNPA = 32768,
PF_Z16 = 65536,
PF_VXE3 = 131072,
PF_ARCH15 = 262144
PF_Z17 = 262144
};
/* This is necessary to avoid a warning about comparing different enum
@ -124,10 +124,10 @@ enum processor_flags
(s390_arch_flags & PF_VXE3)
#define TARGET_CPU_VXE3_P(opts) \
(opts->x_s390_arch_flags & PF_VXE3)
#define TARGET_CPU_ARCH15 \
(s390_arch_flags & PF_ARCH15)
#define TARGET_CPU_ARCH15_P(opts) \
(opts->x_s390_arch_flags & PF_ARCH15)
#define TARGET_CPU_Z17 \
(s390_arch_flags & PF_Z17)
#define TARGET_CPU_Z17_P(opts) \
(opts->x_s390_arch_flags & PF_Z17)
#define TARGET_HARD_FLOAT_P(opts) (!TARGET_SOFT_FLOAT_P(opts))
@ -198,9 +198,9 @@ enum processor_flags
(TARGET_VX && TARGET_CPU_VXE3)
#define TARGET_VXE3_P(opts) \
(TARGET_VX_P (opts) && TARGET_CPU_VXE3_P (opts))
#define TARGET_ARCH15 (TARGET_ZARCH && TARGET_CPU_ARCH15)
#define TARGET_ARCH15_P(opts) \
(TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_ARCH15_P (opts))
#define TARGET_Z17 (TARGET_ZARCH && TARGET_CPU_Z17)
#define TARGET_Z17_P(opts) \
(TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z17_P (opts))
#if defined(HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13)
#define TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS TARGET_Z13

34
gcc/config/s390/s390.md
View file

@ -603,7 +603,7 @@
(const (symbol_ref "s390_tune_attr")))
(define_attr "cpu_facility"
"standard,ieee,zarch,cpu_zarch,longdisp,extimm,dfp,z10,z196,zEC12,vx,z13,z14,vxe,z15,vxe2,z16,nnpa,vxe3,arch15"
"standard,ieee,zarch,cpu_zarch,longdisp,extimm,dfp,z10,z196,zEC12,vx,z13,z14,vxe,z15,vxe2,z16,nnpa,vxe3,z17"
(const_string "standard"))
(define_attr "enabled" ""
@ -681,8 +681,8 @@
(match_test "TARGET_VXE3"))
(const_int 1)
(and (eq_attr "cpu_facility" "arch15")
(match_test "TARGET_ARCH15"))
(and (eq_attr "cpu_facility" "z17")
(match_test "TARGET_Z17"))
(const_int 1)
]
(const_int 0)))
@ -2056,7 +2056,7 @@
[(set (match_operand:DI 0 "register_operand" "=d")
(ashift:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "a"))
(const_int LXAMODEITER)))]
"TARGET_ARCH15 && TARGET_64BIT"
"TARGET_Z17 && TARGET_64BIT"
"lxa<lxamode>\t%0,0(%1,0)"
[(set_attr "op_type" "RXY")])
@ -2066,7 +2066,7 @@
(ashift:DI (sign_extend:DI (plus:SI (match_operand:SI 1 "register_operand" "a")
(match_operand:SI 2 "const_int_operand")))
(const_int LXAMODEITER)))]
"TARGET_ARCH15 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
"TARGET_Z17 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
"lxa<lxamode>\t%0,%2(%1,0)"
[(set_attr "op_type" "RXY")])
@ -2076,7 +2076,7 @@
(plus:DI (ashift:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "a"))
(const_int LXAMODEITER))
(match_operand:DI 2 "register_operand" "a")))]
"TARGET_ARCH15 && TARGET_64BIT"
"TARGET_Z17 && TARGET_64BIT"
"lxa<lxamode>\t%0,0(%1,%2)"
[(set_attr "op_type" "RXY")])
@ -2087,7 +2087,7 @@
(match_operand:SI 2 "const_int_operand")))
(const_int LXAMODEITER))
(match_operand:DI 3 "register_operand" "a")))]
"TARGET_ARCH15 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
"TARGET_Z17 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
"lxa<lxamode>\t%0,%2(%1,%3)"
[(set_attr "op_type" "RXY")])
@ -2096,7 +2096,7 @@
(plus:DI (sign_extend:DI (plus:SI (match_operand:SI 1 "register_operand" "a")
(match_operand:SI 2 "const_int_operand")))
(match_operand:DI 3 "register_operand" "a")))]
"TARGET_ARCH15 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
"TARGET_Z17 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
"lxab\t%0,%2(%1,%3)"
[(set_attr "op_type" "RXY")])
@ -2113,7 +2113,7 @@
0)
(const_int LXAMODEITER))
(const_int <LLXAMASK>)))]
"TARGET_ARCH15 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
"TARGET_Z17 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
"llxa<lxamode>\t%0,%2(%1,0)"
[(set_attr "op_type" "RXY")])
@ -2124,7 +2124,7 @@
(const_int LXAMODEITER))
(const_int <LLXAMASK>))
(match_operand:DI 2 "register_operand" "a")))]
"TARGET_ARCH15 && TARGET_64BIT"
"TARGET_Z17 && TARGET_64BIT"
"llxa<lxamode>\t%0,0(%1,%2)"
[(set_attr "op_type" "RXY")])
@ -2137,7 +2137,7 @@
(const_int LXAMODEITER))
(const_int <LLXAMASK>))
(match_operand:DI 3 "register_operand" "a")))]
"TARGET_ARCH15 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
"TARGET_Z17 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
"llxa<lxamode>\t%0,%2(%1,%3)"
[(set_attr "op_type" "RXY")])
@ -2146,7 +2146,7 @@
(plus:DI (zero_extend:DI (plus:SI (match_operand:SI 1 "register_operand" "a")
(match_operand:SI 2 "const_int_operand")))
(match_operand:DI 3 "register_operand" "a")))]
"TARGET_ARCH15 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
"TARGET_Z17 && TARGET_64BIT && INTVAL (operands[2]) >= -0x80000 && INTVAL (operands[2]) <= 0x7FFFF"
"llxab\t%0,%2(%1,%3)"
[(set_attr "op_type" "RXY")])
@ -4940,7 +4940,7 @@
(unspec:DI [(match_operand:DI 1 "register_operand" "d")
(match_operand:DI 2 "register_operand" "d")]
UNSPEC_BDEPG))]
"TARGET_ARCH15 && TARGET_64BIT"
"TARGET_Z17 && TARGET_64BIT"
"bdepg\t%0,%1,%2"
[(set_attr "op_type" "RRF")])
@ -4953,7 +4953,7 @@
(unspec:DI [(match_operand:DI 1 "register_operand" "d")
(match_operand:DI 2 "register_operand" "d")]
UNSPEC_BEXTG))]
"TARGET_ARCH15 && TARGET_64BIT"
"TARGET_Z17 && TARGET_64BIT"
"bextg\t%0,%1,%2"
[(set_attr "op_type" "RRF")])
@ -9580,7 +9580,7 @@
(clz:DI (match_operand:DI 1 "register_operand" "d")))]
"TARGET_EXTIMM && TARGET_ZARCH"
{
if (!(TARGET_ARCH15 && TARGET_64BIT))
if (!(TARGET_Z17 && TARGET_64BIT))
{
rtx_insn *insn;
rtx clz_equal;
@ -9601,7 +9601,7 @@
(define_insn "*clzg"
[(set (match_operand:DI 0 "register_operand" "=d")
(clz:DI (match_operand:DI 1 "register_operand" "d")))]
"TARGET_ARCH15 && TARGET_64BIT"
"TARGET_Z17 && TARGET_64BIT"
"clzg\t%0,%1"
[(set_attr "op_type" "RRE")])
@ -9630,7 +9630,7 @@
(define_insn "ctzdi2"
[(set (match_operand:DI 0 "register_operand" "=d")
(ctz:DI (match_operand:DI 1 "register_operand" "d")))]
"TARGET_ARCH15 && TARGET_64BIT"
"TARGET_Z17 && TARGET_64BIT"
"ctzg\t%0,%1"
[(set_attr "op_type" "RRE")])

5
gcc/config/s390/s390.opt
View file

@ -122,7 +122,10 @@ EnumValue
Enum(processor_type) String(z16) Value(PROCESSOR_3931_Z16)
EnumValue
Enum(processor_type) String(arch15) Value(PROCESSOR_ARCH15)
Enum(processor_type) String(arch15) Value(PROCESSOR_9175_Z17)
EnumValue
Enum(processor_type) String(z17) Value(PROCESSOR_9175_Z17)
EnumValue
Enum(processor_type) String(native) Value(PROCESSOR_NATIVE) DriverOnly

2
gcc/doc/invoke.texi
View file

@ -33344,7 +33344,7 @@ system representing a certain processor type. Possible values for
@samp{z9-109}, @samp{z9-ec}/@samp{arch7}, @samp{z10}/@samp{arch8},
@samp{z196}/@samp{arch9}, @samp{zEC12}, @samp{z13}/@samp{arch11},
@samp{z14}/@samp{arch12}, @samp{z15}/@samp{arch13},
@samp{z16}/@samp{arch14}, and @samp{native}.
@samp{z16}/@samp{arch14}, @samp{z17}/@samp{arch15}, and @samp{native}.
The default is @option{-march=z900}.