From 17ad8a3bb9d5d8ccee55b08abba6fb154e5cf32b Mon Sep 17 00:00:00 2001 From: Jeffrey A Law Date: Fri, 24 Oct 1997 23:36:42 +0000 Subject: [PATCH] mn10200.c (indirect_memory_operand): Delete unused function. * mn10200.c (indirect_memory_operand): Delete unused function. * mn10200.h (EXTRA_CONSTRAINT): Handle 'R'. * mn10200.md (bset, bclr insns): Handle output in a reg too. From-SVN: r16169 --- gcc/ChangeLog | 6 +++++ gcc/config/mn10200/mn10200.c | 10 ------- gcc/config/mn10200/mn10200.h | 7 ++++- gcc/config/mn10200/mn10200.md | 50 ++++++++++++++++++++++------------- 4 files changed, 43 insertions(+), 30 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a38782fca7d..d26d46476a8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +Fri Oct 24 17:40:34 1997 Jeffrey A Law (law@cygnus.com) + + * mn10200.c (indirect_memory_operand): Delete unused function. + * mn10200.h (EXTRA_CONSTRAINT): Handle 'R'. + * mn10200.md (bset, bclr insns): Handle output in a reg too. + Fri Oct 24 15:54:57 1997 Richard Henderson * alpha.md (call patterns): Revert Oct 16 change; if we are to elide diff --git a/gcc/config/mn10200/mn10200.c b/gcc/config/mn10200/mn10200.c index 774755f7a23..25d5e20b7c3 100644 --- a/gcc/config/mn10200/mn10200.c +++ b/gcc/config/mn10200/mn10200.c @@ -864,16 +864,6 @@ call_address_operand (op, mode) return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == REG); } -/* Return true if OP is an indirect memory operand, the "bset" and "bclr" - insns use this predicate. */ -int -indirect_memory_operand (op, mode) - rtx op; - enum machine_mode mode; -{ - return (GET_CODE (op) == MEM && GET_CODE (XEXP (op, 0)) == REG); -} - /* Return true if OP is a memory operand with a constant address. A special PSImode move pattern uses this predicate. */ int diff --git a/gcc/config/mn10200/mn10200.h b/gcc/config/mn10200/mn10200.h index 4ab05e915a1..3b2f74cd7ca 100644 --- a/gcc/config/mn10200/mn10200.h +++ b/gcc/config/mn10200/mn10200.h @@ -614,10 +614,15 @@ extern struct rtx_def *function_arg(); #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X) /* Extra constraints. */ +#define OK_FOR_R(OP) \ + (GET_CODE (OP) == MEM \ + && GET_MODE (OP) == QImode \ + && REG_P (XEXP (OP, 0))) /* Q is used for sp + in the {zero,sign}_extendpsisi2 patterns. */ #define EXTRA_CONSTRAINT(OP, C) \ - ((C) == 'S' ? GET_CODE (OP) == SYMBOL_REF : \ + ((C) == 'R' ? OK_FOR_R (OP) : \ + (C) == 'S' ? GET_CODE (OP) == SYMBOL_REF : \ (C) == 'Q' ? GET_CODE (OP) == PLUS : 0) /* Maximum number of registers that can appear in a valid memory address. */ diff --git a/gcc/config/mn10200/mn10200.md b/gcc/config/mn10200/mn10200.md index 2fffb91c496..443fc8b633e 100644 --- a/gcc/config/mn10200/mn10200.md +++ b/gcc/config/mn10200/mn10200.md @@ -650,54 +650,66 @@ ;; BIT INSTRUCTIONS ;; ----------------------------------------------------------------- -;; When clearing a set of bits in memory, we load the inverted bitmask into -;; a register, then use bclr. +;; These clears a constant set of bits in memory or in a register. +;; We must support register destinations to make reload happy. (define_insn "" - [(set (match_operand:QI 0 "indirect_memory_operand" "") + [(set (match_operand:QI 0 "general_operand" "R,d") (subreg:QI (and:HI (subreg:HI (match_dup 0) 0) (match_operand 1 "const_int_operand" "")) 0)) - (clobber (match_scratch:HI 2 "=&d"))] + (clobber (match_scratch:HI 2 "=&d,X"))] "" - "mov %N1,%2\;bclr %2,%0" + "@ + mov %N1,%2\;bclr %2,%0 + and %1,%0" [(set_attr "cc" "clobber")]) -;; These clear a non-constant set of bits in memory. +;; This clears a variable set of bits in memory or in a register. (define_insn "" - [(set (match_operand:QI 0 "indirect_memory_operand" "") + [(set (match_operand:QI 0 "general_operand" "R,d") (subreg:QI (and:HI (subreg:HI (match_dup 0) 0) - (not:HI (match_operand:HI 1 "general_operand" "d"))) 0))] + (not:HI (match_operand:HI 1 "general_operand" "d,d"))) 0)) + (clobber (match_scratch:HI 2 "=X,&d"))] "" - "bclr %1,%0" + "@ + bclr %1,%0 + mov %1,%2\;not %2\;and %2,%0" [(set_attr "cc" "clobber")]) (define_insn "" - [(set (match_operand:QI 0 "indirect_memory_operand" "") + [(set (match_operand:QI 0 "general_operand" "R,d") (subreg:QI - (and:HI (not:HI (match_operand:HI 1 "general_operand" "d")) - (subreg:HI (match_dup 0) 0)) 0))] + (and:HI (not:HI (match_operand:HI 1 "general_operand" "d,d")) + (subreg:HI (match_dup 0) 0)) 0)) + (clobber (match_scratch:HI 2 "=X,&d"))] "" - "bclr %1,%0" + "@ + bclr %1,%0 + mov %1,%2\;not %2\;and %2,%0" [(set_attr "cc" "clobber")]) ;; These set bits in memory. (define_insn "" - [(set (match_operand:QI 0 "indirect_memory_operand" "") + [(set (match_operand:QI 0 "general_operand" "R,d") (subreg:QI (ior:HI (subreg:HI (match_dup 0) 0) - (match_operand:HI 1 "general_operand" "d")) 0))] + (match_operand:HI 1 "general_operand" "d,d")) 0))] "" - "bset %1,%0" + "@ + bset %1,%0 + or %1,%0" [(set_attr "cc" "clobber")]) (define_insn "" - [(set (match_operand:QI 0 "indirect_memory_operand" "") + [(set (match_operand:QI 0 "general_operand" "R,d") (subreg:QI - (ior:HI (match_operand:HI 1 "general_operand" "d") + (ior:HI (match_operand:HI 1 "general_operand" "d,d") (subreg:HI (match_dup 0) 0)) 0))] "" - "bset %1,%0" + "@ + bset %1,%0 + or %1,%0" [(set_attr "cc" "clobber")]) ;; Not any shorter/faster than using cmp, but it might save a