diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b1850b9c4f9..79e74fa1e31 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2014-04-22 Renlin Li + + * config/aarch64/aarch64.c (aarch64_print_operand_address): Adjust + the output asm format. + 2014-04-22 James Greenhalgh * config/aarch64/aarch64-simd.md diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 7b6c2b38e03..10793ddbed6 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -3836,34 +3836,34 @@ aarch64_print_operand_address (FILE *f, rtx x) if (addr.offset == const0_rtx) asm_fprintf (f, "[%s]", reg_names [REGNO (addr.base)]); else - asm_fprintf (f, "[%s,%wd]", reg_names [REGNO (addr.base)], + asm_fprintf (f, "[%s, %wd]", reg_names [REGNO (addr.base)], INTVAL (addr.offset)); return; case ADDRESS_REG_REG: if (addr.shift == 0) - asm_fprintf (f, "[%s,%s]", reg_names [REGNO (addr.base)], + asm_fprintf (f, "[%s, %s]", reg_names [REGNO (addr.base)], reg_names [REGNO (addr.offset)]); else - asm_fprintf (f, "[%s,%s,lsl %u]", reg_names [REGNO (addr.base)], + asm_fprintf (f, "[%s, %s, lsl %u]", reg_names [REGNO (addr.base)], reg_names [REGNO (addr.offset)], addr.shift); return; case ADDRESS_REG_UXTW: if (addr.shift == 0) - asm_fprintf (f, "[%s,w%d,uxtw]", reg_names [REGNO (addr.base)], + asm_fprintf (f, "[%s, w%d, uxtw]", reg_names [REGNO (addr.base)], REGNO (addr.offset) - R0_REGNUM); else - asm_fprintf (f, "[%s,w%d,uxtw %u]", reg_names [REGNO (addr.base)], + asm_fprintf (f, "[%s, w%d, uxtw %u]", reg_names [REGNO (addr.base)], REGNO (addr.offset) - R0_REGNUM, addr.shift); return; case ADDRESS_REG_SXTW: if (addr.shift == 0) - asm_fprintf (f, "[%s,w%d,sxtw]", reg_names [REGNO (addr.base)], + asm_fprintf (f, "[%s, w%d, sxtw]", reg_names [REGNO (addr.base)], REGNO (addr.offset) - R0_REGNUM); else - asm_fprintf (f, "[%s,w%d,sxtw %u]", reg_names [REGNO (addr.base)], + asm_fprintf (f, "[%s, w%d, sxtw %u]", reg_names [REGNO (addr.base)], REGNO (addr.offset) - R0_REGNUM, addr.shift); return; @@ -3871,27 +3871,27 @@ aarch64_print_operand_address (FILE *f, rtx x) switch (GET_CODE (x)) { case PRE_INC: - asm_fprintf (f, "[%s,%d]!", reg_names [REGNO (addr.base)], + asm_fprintf (f, "[%s, %d]!", reg_names [REGNO (addr.base)], GET_MODE_SIZE (aarch64_memory_reference_mode)); return; case POST_INC: - asm_fprintf (f, "[%s],%d", reg_names [REGNO (addr.base)], + asm_fprintf (f, "[%s], %d", reg_names [REGNO (addr.base)], GET_MODE_SIZE (aarch64_memory_reference_mode)); return; case PRE_DEC: - asm_fprintf (f, "[%s,-%d]!", reg_names [REGNO (addr.base)], + asm_fprintf (f, "[%s, -%d]!", reg_names [REGNO (addr.base)], GET_MODE_SIZE (aarch64_memory_reference_mode)); return; case POST_DEC: - asm_fprintf (f, "[%s],-%d", reg_names [REGNO (addr.base)], + asm_fprintf (f, "[%s], -%d", reg_names [REGNO (addr.base)], GET_MODE_SIZE (aarch64_memory_reference_mode)); return; case PRE_MODIFY: - asm_fprintf (f, "[%s,%wd]!", reg_names [REGNO (addr.base)], + asm_fprintf (f, "[%s, %wd]!", reg_names [REGNO (addr.base)], INTVAL (addr.offset)); return; case POST_MODIFY: - asm_fprintf (f, "[%s],%wd", reg_names [REGNO (addr.base)], + asm_fprintf (f, "[%s], %wd", reg_names [REGNO (addr.base)], INTVAL (addr.offset)); return; default: @@ -3900,7 +3900,7 @@ aarch64_print_operand_address (FILE *f, rtx x) break; case ADDRESS_LO_SUM: - asm_fprintf (f, "[%s,#:lo12:", reg_names [REGNO (addr.base)]); + asm_fprintf (f, "[%s, #:lo12:", reg_names [REGNO (addr.base)]); output_addr_const (f, addr.offset); asm_fprintf (f, "]"); return;