re PR target/92140 (clang vs gcc optimizing with adc/sbb)
PR target/92140 * config/i386/predicates.md (int_nonimmediate_operand): New special predicate. * config/i386/i386.md (*add<mode>3_eq, *add<mode>3_ne, *add<mode>3_eq_0, *add<mode>3_ne_0, *sub<mode>3_eq, *sub<mode>3_ne, *sub<mode>3_eq_1, *sub<mode>3_eq_0, *sub<mode>3_ne_0): New define_insn_and_split patterns. * gcc.target/i386/pr92140.c: New test. * gcc.c-torture/execute/pr92140.c: New test. Co-Authored-By: Uros Bizjak <ubizjak@gmail.com> From-SVN: r277203
This commit is contained in:
Jakub Jelinek
Jakub Jelinek
parent
2366bf60c6
commit
15643a0dfc
6 changed files with 369 additions and 0 deletions
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@ -1,3 +1,14 @@
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2019-10-19 Jakub Jelinek <jakub@redhat.com>
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Uroš Bizjak <ubizjak@gmail.com>
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PR target/92140
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* config/i386/predicates.md (int_nonimmediate_operand): New special
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predicate.
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* config/i386/i386.md (*add<mode>3_eq, *add<mode>3_ne,
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*add<mode>3_eq_0, *add<mode>3_ne_0, *sub<mode>3_eq, *sub<mode>3_ne,
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*sub<mode>3_eq_1, *sub<mode>3_eq_0, *sub<mode>3_ne_0): New
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define_insn_and_split patterns.
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2019-10-19 Iain Sandoe <iain@sandoe.co.uk>
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* config/rs6000/rs6000.md: Delete out--of-date comment about
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@ -6843,6 +6843,228 @@
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[(set_attr "type" "alu")
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(set_attr "mode" "SI")])
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;; x == 0 with zero flag test can be done also as x < 1U with carry flag
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;; test, where the latter is preferrable if we have some carry consuming
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;; instruction.
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;; For x != 0, we need to use x < 1U with negation of carry, i.e.
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;; + (1 - CF).
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(define_insn_and_split "*add<mode>3_eq"
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[(set (match_operand:SWI 0 "nonimmediate_operand")
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(plus:SWI
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(plus:SWI
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(eq:SWI (match_operand 3 "int_nonimmediate_operand") (const_int 0))
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(match_operand:SWI 1 "nonimmediate_operand"))
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(match_operand:SWI 2 "<general_operand>")))
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(clobber (reg:CC FLAGS_REG))]
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"ix86_binary_operator_ok (PLUS, <MODE>mode, operands)
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&& can_create_pseudo_p ()"
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"#"
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"&& 1"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_dup 3) (const_int 1)))
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(parallel [(set (match_dup 0)
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(plus:SWI
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(plus:SWI (ltu:SWI (reg:CC FLAGS_REG) (const_int 0))
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(match_dup 1))
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(match_dup 2)))
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(clobber (reg:CC FLAGS_REG))])])
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(define_insn_and_split "*add<mode>3_ne"
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[(set (match_operand:SWI 0 "nonimmediate_operand")
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(plus:SWI
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(plus:SWI
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(ne:SWI (match_operand 3 "int_nonimmediate_operand") (const_int 0))
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(match_operand:SWI 1 "nonimmediate_operand"))
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(match_operand:SWI 2 "<immediate_operand>")))
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(clobber (reg:CC FLAGS_REG))]
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"CONST_INT_P (operands[2])
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&& (<MODE>mode != DImode
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|| INTVAL (operands[2]) != HOST_WIDE_INT_C (-0x80000000))
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&& ix86_binary_operator_ok (PLUS, <MODE>mode, operands)
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&& can_create_pseudo_p ()"
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"#"
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"&& 1"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_dup 3) (const_int 1)))
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(parallel [(set (match_dup 0)
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(minus:SWI
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(minus:SWI (match_dup 1)
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(ltu:SWI (reg:CC FLAGS_REG) (const_int 0)))
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(match_dup 2)))
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(clobber (reg:CC FLAGS_REG))])]
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{
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operands[2] = gen_int_mode (~INTVAL (operands[2]),
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<MODE>mode == DImode ? SImode : <MODE>mode);
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})
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(define_insn_and_split "*add<mode>3_eq_0"
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[(set (match_operand:SWI 0 "nonimmediate_operand")
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(plus:SWI
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(eq:SWI (match_operand 2 "int_nonimmediate_operand") (const_int 0))
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(match_operand:SWI 1 "<general_operand>")))
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(clobber (reg:CC FLAGS_REG))]
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"ix86_unary_operator_ok (PLUS, <MODE>mode, operands)
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&& can_create_pseudo_p ()"
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"#"
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"&& 1"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_dup 2) (const_int 1)))
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(parallel [(set (match_dup 0)
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(plus:SWI (ltu:SWI (reg:CC FLAGS_REG) (const_int 0))
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(match_dup 1)))
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(clobber (reg:CC FLAGS_REG))])]
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{
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if (!nonimmediate_operand (operands[1], <MODE>mode))
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operands[1] = force_reg (<MODE>mode, operands[1]);
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})
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(define_insn_and_split "*add<mode>3_ne_0"
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[(set (match_operand:SWI 0 "nonimmediate_operand")
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(plus:SWI
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(ne:SWI (match_operand 2 "int_nonimmediate_operand") (const_int 0))
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(match_operand:SWI 1 "<general_operand>")))
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(clobber (reg:CC FLAGS_REG))]
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"ix86_unary_operator_ok (PLUS, <MODE>mode, operands)
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&& can_create_pseudo_p ()"
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"#"
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"&& 1"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_dup 2) (const_int 1)))
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(parallel [(set (match_dup 0)
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(minus:SWI (minus:SWI
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(match_dup 1)
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(ltu:SWI (reg:CC FLAGS_REG) (const_int 0)))
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(const_int -1)))
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(clobber (reg:CC FLAGS_REG))])]
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{
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if (!nonimmediate_operand (operands[1], <MODE>mode))
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operands[1] = force_reg (<MODE>mode, operands[1]);
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})
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(define_insn_and_split "*sub<mode>3_eq"
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[(set (match_operand:SWI 0 "nonimmediate_operand")
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(minus:SWI
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(minus:SWI
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(match_operand:SWI 1 "nonimmediate_operand")
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(eq:SWI (match_operand 3 "int_nonimmediate_operand")
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(const_int 0)))
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(match_operand:SWI 2 "<general_operand>")))
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(clobber (reg:CC FLAGS_REG))]
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"ix86_binary_operator_ok (MINUS, <MODE>mode, operands)
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&& can_create_pseudo_p ()"
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"#"
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"&& 1"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_dup 3) (const_int 1)))
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(parallel [(set (match_dup 0)
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(minus:SWI
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(minus:SWI (match_dup 1)
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(ltu:SWI (reg:CC FLAGS_REG) (const_int 0)))
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(match_dup 2)))
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(clobber (reg:CC FLAGS_REG))])])
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(define_insn_and_split "*sub<mode>3_ne"
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[(set (match_operand:SWI 0 "nonimmediate_operand")
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(plus:SWI
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(minus:SWI
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(match_operand:SWI 1 "nonimmediate_operand")
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(ne:SWI (match_operand 3 "int_nonimmediate_operand")
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(const_int 0)))
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(match_operand:SWI 2 "<immediate_operand>")))
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(clobber (reg:CC FLAGS_REG))]
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"CONST_INT_P (operands[2])
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&& (<MODE>mode != DImode
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|| INTVAL (operands[2]) != HOST_WIDE_INT_C (-0x80000000))
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&& ix86_binary_operator_ok (MINUS, <MODE>mode, operands)
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&& can_create_pseudo_p ()"
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"#"
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"&& 1"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_dup 3) (const_int 1)))
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(parallel [(set (match_dup 0)
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(plus:SWI
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(plus:SWI (ltu:SWI (reg:CC FLAGS_REG) (const_int 0))
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(match_dup 1))
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(match_dup 2)))
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(clobber (reg:CC FLAGS_REG))])]
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{
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operands[2] = gen_int_mode (INTVAL (operands[2]) - 1,
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<MODE>mode == DImode ? SImode : <MODE>mode);
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})
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(define_insn_and_split "*sub<mode>3_eq_1"
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[(set (match_operand:SWI 0 "nonimmediate_operand")
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(plus:SWI
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(minus:SWI
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(match_operand:SWI 1 "nonimmediate_operand")
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(eq:SWI (match_operand 3 "int_nonimmediate_operand")
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(const_int 0)))
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(match_operand:SWI 2 "<immediate_operand>")))
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(clobber (reg:CC FLAGS_REG))]
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"CONST_INT_P (operands[2])
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&& (<MODE>mode != DImode
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|| INTVAL (operands[2]) != HOST_WIDE_INT_C (-0x80000000))
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&& ix86_binary_operator_ok (MINUS, <MODE>mode, operands)
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&& can_create_pseudo_p ()"
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"#"
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"&& 1"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_dup 3) (const_int 1)))
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(parallel [(set (match_dup 0)
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(minus:SWI
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(minus:SWI (match_dup 1)
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(ltu:SWI (reg:CC FLAGS_REG) (const_int 0)))
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(match_dup 2)))
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(clobber (reg:CC FLAGS_REG))])]
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{
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operands[2] = gen_int_mode (-INTVAL (operands[2]),
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<MODE>mode == DImode ? SImode : <MODE>mode);
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})
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(define_insn_and_split "*sub<mode>3_eq_0"
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[(set (match_operand:SWI 0 "nonimmediate_operand")
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(minus:SWI
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(match_operand:SWI 1 "<general_operand>")
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(eq:SWI (match_operand 2 "int_nonimmediate_operand") (const_int 0))))
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(clobber (reg:CC FLAGS_REG))]
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"ix86_unary_operator_ok (MINUS, <MODE>mode, operands)
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&& can_create_pseudo_p ()"
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"#"
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"&& 1"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_dup 2) (const_int 1)))
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(parallel [(set (match_dup 0)
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(minus:SWI (match_dup 1)
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(ltu:SWI (reg:CC FLAGS_REG) (const_int 0))))
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(clobber (reg:CC FLAGS_REG))])]
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{
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if (!nonimmediate_operand (operands[1], <MODE>mode))
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operands[1] = force_reg (<MODE>mode, operands[1]);
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})
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(define_insn_and_split "*sub<mode>3_ne_0"
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[(set (match_operand:SWI 0 "nonimmediate_operand")
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(minus:SWI
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(match_operand:SWI 1 "<general_operand>")
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(ne:SWI (match_operand 2 "int_nonimmediate_operand") (const_int 0))))
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(clobber (reg:CC FLAGS_REG))]
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"ix86_unary_operator_ok (MINUS, <MODE>mode, operands)
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&& can_create_pseudo_p ()"
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"#"
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"&& 1"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_dup 2) (const_int 1)))
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(parallel [(set (match_dup 0)
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(plus:SWI (plus:SWI
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(ltu:SWI (reg:CC FLAGS_REG) (const_int 0))
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(match_dup 1))
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(const_int -1)))
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(clobber (reg:CC FLAGS_REG))])]
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{
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if (!nonimmediate_operand (operands[1], <MODE>mode))
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operands[1] = force_reg (<MODE>mode, operands[1]);
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})
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;; The patterns that match these are at the end of this file.
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(define_expand "<plusminus_insn>xf3"
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@ -100,6 +100,15 @@
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(match_test "GET_MODE (op) == SImode")
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(match_test "GET_MODE (op) == HImode"))))
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;; Match a DI, SI, HI or QImode nonimmediate_operand.
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(define_special_predicate "int_nonimmediate_operand"
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(and (match_operand 0 "nonimmediate_operand")
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(ior (and (match_test "TARGET_64BIT")
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(match_test "GET_MODE (op) == DImode"))
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(match_test "GET_MODE (op) == SImode")
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(match_test "GET_MODE (op) == HImode")
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(match_test "GET_MODE (op) == QImode"))))
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;; Match register operands, but include memory operands for TARGET_SSE_MATH.
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(define_predicate "register_ssemem_operand"
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(if_then_else
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@ -1,3 +1,9 @@
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2019-10-19 Jakub Jelinek <jakub@redhat.com>
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PR target/92140
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* gcc.target/i386/pr92140.c: New test.
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* gcc.c-torture/execute/pr92140.c: New test.
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2019-10-19 Iain Sandoe <iain@sandoe.co.uk>
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* gcc.dg/Wnonnull.c: Add attributed function declarations for
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83
gcc/testsuite/gcc.c-torture/execute/pr92140.c
Normal file
83
gcc/testsuite/gcc.c-torture/execute/pr92140.c
Normal file
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@ -0,0 +1,83 @@
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/* PR target/92140 */
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char c;
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int v;
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__attribute__((noipa)) void f1 (void) { v += c != 0; }
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__attribute__((noipa)) void f2 (void) { v -= c != 0; }
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__attribute__((noipa)) void f3 (void) { v += c == 0; }
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__attribute__((noipa)) void f4 (void) { v -= c == 0; }
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__attribute__((noipa)) void f5 (void) { v += (c != 0) - 26; }
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__attribute__((noipa)) void f6 (void) { v -= (c != 0) - 26; }
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__attribute__((noipa)) void f7 (void) { v += (c == 0) - 26; }
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__attribute__((noipa)) void f8 (void) { v -= (c == 0) - 26; }
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__attribute__((noipa)) void f9 (void) { v += (c != 0) + 42; }
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__attribute__((noipa)) void f10 (void) { v -= (c != 0) + 42; }
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__attribute__((noipa)) void f11 (void) { v += (c == 0) + 42; }
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__attribute__((noipa)) void f12 (void) { v -= (c == 0) + 42; }
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__attribute__((noipa)) void f13 (int z) { v += (c == 0) + z; }
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__attribute__((noipa)) void f14 (int z) { v -= (c == 0) + z; }
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__attribute__((noipa)) unsigned int f15 (unsigned int n) { return n ? 2 : 1; }
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int
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main ()
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{
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int i;
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for (i = 0; i < 2; i++)
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{
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v = 15;
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if (i == 1)
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c = 37;
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f1 ();
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if (v != 15 + i)
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__builtin_abort ();
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f2 ();
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if (v != 15)
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__builtin_abort ();
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f3 ();
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if (v != 16 - i)
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__builtin_abort ();
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f4 ();
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if (v != 15)
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__builtin_abort ();
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f5 ();
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if (v != 15 + i - 26)
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__builtin_abort ();
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f6 ();
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if (v != 15)
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__builtin_abort ();
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f7 ();
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if (v != 16 - i - 26)
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__builtin_abort ();
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f8 ();
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if (v != 15)
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__builtin_abort ();
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f9 ();
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if (v != 15 + i + 42)
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__builtin_abort ();
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f10 ();
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if (v != 15)
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__builtin_abort ();
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f11 ();
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if (v != 16 - i + 42)
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__builtin_abort ();
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f12 ();
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if (v != 15)
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__builtin_abort ();
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f13 (173);
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if (v != 16 - i + 173)
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__builtin_abort ();
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f14 (173);
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if (v != 15)
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__builtin_abort ();
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f13 (-35);
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if (v != 16 - i - 35)
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__builtin_abort ();
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f14 (-35);
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if (v != 15)
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__builtin_abort ();
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}
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if (f15 (0) != 1 || f15 (1) != 2 || f15 (371) != 2)
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__builtin_abort ();
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return 0;
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}
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38
gcc/testsuite/gcc.target/i386/pr92140.c
Normal file
38
gcc/testsuite/gcc.target/i386/pr92140.c
Normal file
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@ -0,0 +1,38 @@
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/* PR target/92140 */
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/* { dg-do compile { target nonpic } } */
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/* { dg-options "-O2 -mtune=generic -masm=att" } */
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/* { dg-additional-options "-mregparm=1" { target ia32 } } */
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/* { dg-final { scan-assembler-times "\tsbbl\t\\\$-1, v" 1 } } */
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/* { dg-final { scan-assembler-times "\tadcl\t\\\$-1, v" 1 } } */
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/* { dg-final { scan-assembler-times "\tadcl\t\\\$0, v" 1 } } */
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/* { dg-final { scan-assembler-times "\tsbbl\t\\\$0, v" 1 } } */
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/* { dg-final { scan-assembler-times "\tsbbl\t\\\$25, v" 1 } } */
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/* { dg-final { scan-assembler-times "\tadcl\t\\\$25, v" 1 } } */
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/* { dg-final { scan-assembler-times "\tadcl\t\\\$-26, v" 1 } } */
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/* { dg-final { scan-assembler-times "\tsbbl\t\\\$-26, v" 1 } } */
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/* { dg-final { scan-assembler-times "\tsbbl\t\\\$-43, v" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "\tadcl\t\\\$-43, v" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "\tadcl\t\\\$42, v" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "\tsbbl\t\\\$42, v" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "\tadcl\t%\[a-z0-9]*, v" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "\tsbbl\t%\[a-z0-9]*, v" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "\tsbbl\t\\\$-1, %" 1 } } */
|
||||
|
||||
char c;
|
||||
int v;
|
||||
|
||||
__attribute__((noipa)) void f1 (void) { v += c != 0; }
|
||||
__attribute__((noipa)) void f2 (void) { v -= c != 0; }
|
||||
__attribute__((noipa)) void f3 (void) { v += c == 0; }
|
||||
__attribute__((noipa)) void f4 (void) { v -= c == 0; }
|
||||
__attribute__((noipa)) void f5 (void) { v += (c != 0) - 26; }
|
||||
__attribute__((noipa)) void f6 (void) { v -= (c != 0) - 26; }
|
||||
__attribute__((noipa)) void f7 (void) { v += (c == 0) - 26; }
|
||||
__attribute__((noipa)) void f8 (void) { v -= (c == 0) - 26; }
|
||||
__attribute__((noipa)) void f9 (void) { v += (c != 0) + 42; }
|
||||
__attribute__((noipa)) void f10 (void) { v -= (c != 0) + 42; }
|
||||
__attribute__((noipa)) void f11 (void) { v += (c == 0) + 42; }
|
||||
__attribute__((noipa)) void f12 (void) { v -= (c == 0) + 42; }
|
||||
__attribute__((noipa)) void f13 (int z) { v += (c == 0) + z; }
|
||||
__attribute__((noipa)) void f14 (int z) { v -= (c == 0) + z; }
|
||||
__attribute__((noipa)) unsigned int f15 (unsigned int n) { return n ? 2 : 1; }
|
||||
Loading…
Add table
Reference in a new issue