diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4c298b8c645..905d2b8a2f5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2020-04-28 Kyrylo Tkachov + + * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option. + * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option. + 2020-04-28 Matthew Malcomson Jakub Jelinek diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in index 64b8ba70507..728be500b80 100644 --- a/gcc/config/arm/arm-cpus.in +++ b/gcc/config/arm/arm-cpus.in @@ -1509,7 +1509,6 @@ begin cpu cortex-m55 tune flags LDSCHED architecture armv8.1-m.main+mve.fp+fp.dp isa quirk_no_asmcpu - option nofp remove ALL_FP MVE_FP costs v7m vendor 41 end cpu cortex-m55 diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 04b84e3a10e..fed38e88ae5 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -18841,7 +18841,7 @@ Disables the floating-point and SIMD instructions on @samp{cortex-a8}, @samp{cortex-a9}, @samp{cortex-a12}, @samp{cortex-a15}, @samp{cortex-a17}, @samp{cortex-a15.cortex-a7}, @samp{cortex-a17.cortex-a7}, @samp{cortex-a32}, @samp{cortex-a35}, -@samp{cortex-a53},@samp{cortex-a55} and @samp{cortex-m55}. +@samp{cortex-a53} and @samp{cortex-a55}. @item +nofp.dp Disables the double-precision component of the floating-point instructions