diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e5e5055b9b0..80ae1ab095c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2012-10-28  Andreas Schwab  <schwab@linux-m68k.org>
+
+	* doc/tm.texi.in (Misc): Add newline before @end.
+	* doc/tm.texi: Update.
+
 2012-10-27  Joern Rennecke  <joern.rennecke@embecosm.com>
 
 	* lra-assigns.c (find_hard_regno_for): Fix use of WORDS_BIG_ENDIAN.
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 68713f7bb2f..665c5b1edd6 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -11323,7 +11323,8 @@ accepted by immediate-add plus one.  We currently assume that the
 value of @code{TARGET_CONST_ANCHOR} is a power of 2.  For example, on
 MIPS, where add-immediate takes a 16-bit signed value,
 @code{TARGET_CONST_ANCHOR} is set to @samp{0x8000}.  The default value
-is zero, which disables this optimization.  @end deftypevr
+is zero, which disables this optimization.
+@end deftypevr
 
 @deftypefn {Target Hook} {unsigned HOST_WIDE_INT} TARGET_MEMMODEL_CHECK (unsigned HOST_WIDE_INT @var{val})
 Validate target specific memory model mask bits. When NULL no target specific
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index c325cd4ae6e..289934be17e 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -11165,7 +11165,8 @@ accepted by immediate-add plus one.  We currently assume that the
 value of @code{TARGET_CONST_ANCHOR} is a power of 2.  For example, on
 MIPS, where add-immediate takes a 16-bit signed value,
 @code{TARGET_CONST_ANCHOR} is set to @samp{0x8000}.  The default value
-is zero, which disables this optimization.  @end deftypevr
+is zero, which disables this optimization.
+@end deftypevr
 
 @hook TARGET_MEMMODEL_CHECK
 Validate target specific memory model mask bits. When NULL no target specific