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AVX-512. 74/n. Add byte/word max/mix reduction.

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gcc/
	* config/i386/i386.c
	(emit_reduc_half): Handle V64QI and V32HI mode.
	* config/i386/sse.md
	(define_mode_iterator VI_AVX512BW): New.
	(define_expand "reduc_<code>_<mode>"): Use VI512_48F_12BW.

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>

From-SVN: r216192
This commit is contained in:
Alexander Ivchenko 2014-10-14 08:52:11 +00:00 • committed by Kirill Yukhin
parent 805e20ad38
commit 0ab03ea08c
3 changed files with 22 additions and 3 deletions
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15
gcc/ChangeLog
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@ -1,3 +1,18 @@
2014-10-14 Alexander Ivchenko <alexander.ivchenko@intel.com>
Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Anna Tikhonova <anna.tikhonova@intel.com>
Ilya Tocar <ilya.tocar@intel.com>
Andrey Turetskiy <andrey.turetskiy@intel.com>
Ilya Verbin <ilya.verbin@intel.com>
Kirill Yukhin <kirill.yukhin@intel.com>
Michael Zolotukhin <michael.v.zolotukhin@intel.com>
* config/i386/i386.c
(emit_reduc_half): Handle V64QI and V32HI mode.
* config/i386/sse.md
(define_mode_iterator VI_AVX512BW): New.
(define_expand "reduc_<code>_<mode>"): Use VI512_48F_12BW.
2014-10-14 Alexander Ivchenko <alexander.ivchenko@intel.com>
Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Anna Tikhonova <anna.tikhonova@intel.com>

2
gcc/config/i386/i386.c
View file

@ -41210,6 +41210,8 @@ emit_reduc_half (rtx dest, rtx src, int i)
GEN_INT (i / 2));
}
break;
case V64QImode:
case V32HImode:
case V16SImode:
case V16SFmode:
case V8DImode:

8
gcc/config/i386/sse.md
View file

@ -514,6 +514,8 @@
(define_mode_iterator VI48_256 [V8SI V4DI])
(define_mode_iterator VI48_512 [V16SI V8DI])
(define_mode_iterator VI4_256_8_512 [V8SI V8DI])
(define_mode_iterator VI_AVX512BW
[V16SI V8DI (V32HI "TARGET_AVX512BW") (V64QI "TARGET_AVX512BW")])
;; Int-float size matches
(define_mode_iterator VI4F_128 [V4SI V4SF])
@ -2337,9 +2339,9 @@
})
(define_expand "reduc_<code>_<mode>"
[(umaxmin:VI48_512
(match_operand:VI48_512 0 "register_operand")
(match_operand:VI48_512 1 "register_operand"))]
[(umaxmin:VI_AVX512BW
(match_operand:VI_AVX512BW 0 "register_operand")
(match_operand:VI_AVX512BW 1 "register_operand"))]
"TARGET_AVX512F"
{
ix86_expand_reduc (gen_<code><mode>3, operands[0], operands[1]);