diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2f7835e921e..739c5eac65e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,76 @@ +2021-03-30 Kyrylo Tkachov + + PR target/99820 + * config/aarch64/aarch64.c (aarch64_analyze_loop_vinfo): Check for + available issue_info before using it. + +2021-03-30 Kyrylo Tkachov + + PR target/99822 + * config/aarch64/aarch64.md (sub3_compare1_imm): Do not allow zero + in operand 1. + +2021-03-30 Xionghu Luo + + PR target/99718 + * config/rs6000/altivec.md (altivec_lvsl_reg): Change to ... + (altivec_lvsl_reg_): ... this. + (altivec_lvsr_reg): Change to ... + (altivec_lvsr_reg_): ... this. + * config/rs6000/predicates.md (vec_set_index_operand): New. + * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): + Enable 32bit variable vec_insert for all TARGET_VSX. + * config/rs6000/rs6000.c (rs6000_expand_vector_set_var_p9): + Enable 32bit variable vec_insert for p9 and above. + (rs6000_expand_vector_set_var_p8): Rename to ... + (rs6000_expand_vector_set_var_p7): ... this. + (rs6000_expand_vector_set): Use TARGET_VSX and adjust assert + position. + * config/rs6000/vector.md (vec_set): Use vec_set_index_operand. + * config/rs6000/vsx.md (xl_len_r): Use gen_altivec_lvsl_reg_di and + gen_altivec_lvsr_reg_di. + +2021-03-30 H.J. Lu + + PR target/99744 + * config/i386/ia32intrin.h (__rdtsc): Defined as macro. + (__rdtscp): Likewise. + +2021-03-30 Tamar Christina + + PR tree-optimization/99825 + * tree-vect-slp-patterns.c (vect_check_evenodd_blend): + Reject non-mult 2 lanes. + +2021-03-30 Richard Earnshaw + + PR target/99773 + * config/arm/arm.c (arm_file_start): Fix emission of + Tag_ABI_VFP_args attribute. + +2021-03-30 Richard Biener + + PR tree-optimization/99824 + * stor-layout.c (set_min_and_max_values_for_integral_type): + Assert the precision is within the bounds of + WIDE_INT_MAX_PRECISION. + * tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Use + the outermost component ref only to lower the access size + and initialize that from the access type. + +2021-03-30 Richard Sandiford + + PR target/98136 + * config/aarch64/aarch64.md (mov): Pass multi-instruction + CONST_INTs to aarch64_expand_mov_immediate when called after RA. + +2021-03-30 Mihailo Stojanovic + + * config/aarch64/aarch64.md + (_trunc2): Set the "arch" + attribute to disambiguate between SIMD and FP variants of the + instruction. + 2021-03-29 Jan Hubicka * ipa-modref.c (merge_call_lhs_flags): Correct handling of deref. diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 634b2d7af28..eafec334c60 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20210330 +20210331 diff --git a/gcc/analyzer/ChangeLog b/gcc/analyzer/ChangeLog index 7084246c45a..730039a4b75 100644 --- a/gcc/analyzer/ChangeLog +++ b/gcc/analyzer/ChangeLog @@ -1,3 +1,19 @@ +2021-03-30 David Malcolm + + * region.h (region::dump_to_pp): Remove old decl. + +2021-03-30 David Malcolm + + * sm-file.cc (fileptr_state_machine::on_stmt): Only call + get_diagnostic_tree if the result will be used. + * sm-malloc.cc (malloc_state_machine::on_stmt): Likewise. + (malloc_state_machine::on_deallocator_call): Likewise. + (malloc_state_machine::on_realloc_call): Likewise. + (malloc_state_machine::on_realloc_call): Likewise. + * sm-sensitive.cc + (sensitive_state_machine::warn_for_any_exposure): Likewise. + * sm-taint.cc (taint_state_machine::on_stmt): Likewise. + 2021-03-25 David Malcolm PR analyzer/93695 diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index eb482659150..d4c317c8d39 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,17 @@ +2021-03-30 Nathan Sidwell + + PR c++/99283 + * module.cc (dumper::operator): Make less brittle. + (trees_out::core_bools): VAR_DECLs always have a context. + (trees_out::key_mergeable): Use same_type_p for asserting. + (trees_in::read_var_def): Propagate + DECL_INITIALIZED_BY_CONSTANT_EXPRESSION_P. + +2021-03-30 Jakub Jelinek + + PR c++/99790 + * cp-gimplify.c (cp_gimplify_expr): Handle PTRMEM_CST. + 2021-03-26 Marek Polacek PR c++/98352 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 570f2a7e1c1..b12e44200ae 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,75 @@ +2021-03-30 David Malcolm + + * gcc.dg/analyzer/symbolic-1.c: Fix typo. + +2021-03-30 Nathan Sidwell + + PR c++/99283 + * g++.dg/modules/pr99283-5.h: New. + * g++.dg/modules/pr99283-5_a.H: New. + * g++.dg/modules/pr99283-5_b.H: New. + * g++.dg/modules/pr99283-5_c.C: New. + +2021-03-30 Jakub Jelinek + + PR c++/99790 + * g++.dg/cpp1z/pr99790.C: New test. + +2021-03-30 Kyrylo Tkachov + + PR target/99822 + * gcc.c-torture/compile/pr99822.c: New test. + +2021-03-30 Xionghu Luo + + PR target/99718 + PR target/99718 + * gcc.target/powerpc/fold-vec-insert-char-p8.c: Update + instruction counts. + * gcc.target/powerpc/fold-vec-insert-char-p9.c: Likewise. + * gcc.target/powerpc/fold-vec-insert-double.c: Likewise. + * gcc.target/powerpc/fold-vec-insert-float-p8.c: Likewise. + * gcc.target/powerpc/fold-vec-insert-float-p9.c: Likewise. + * gcc.target/powerpc/fold-vec-insert-int-p8.c: Likewise. + * gcc.target/powerpc/fold-vec-insert-int-p9.c: Likewise. + * gcc.target/powerpc/fold-vec-insert-longlong.c: Likewise. + * gcc.target/powerpc/fold-vec-insert-short-p8.c: Likewise. + * gcc.target/powerpc/fold-vec-insert-short-p9.c: Likewise. + * gcc.target/powerpc/pr79251.p8.c: Likewise. + * gcc.target/powerpc/pr79251.p9.c: Likewise. + * gcc.target/powerpc/vsx-builtin-7.c: Likewise. + * gcc.target/powerpc/pr79251-run.p7.c: New test. + * gcc.target/powerpc/pr79251.p7.c: New test. + +2021-03-30 H.J. Lu + + PR target/99744 + * gcc.target/i386/pr99744-1.c: New test. + +2021-03-30 Tamar Christina + + PR tree-optimization/99825 + * gfortran.dg/vect/pr99825.f90: New test. + +2021-03-30 Kyrylo Tkachov + + PR target/99808 + * gcc.target/aarch64/pr99808.c: Use ULL constant suffix. + +2021-03-30 Richard Biener + + PR tree-optimization/99824 + * gcc.dg/torture/pr99824.c: New testcase. + +2021-03-30 Richard Sandiford + + PR target/98136 + * g++.dg/pr98136.C: New test. + +2021-03-30 Mihailo Stojanovic + + * gcc.target/aarch64/fcvt_nosimd.c: New test. + 2021-03-29 Martin Sebor PR tree-optimization/61869