From 06c8f2ebf062f64e8f4228ec47bdd003df9ef5ed Mon Sep 17 00:00:00 2001
From: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date: Thu, 17 Nov 2022 11:16:54 +0000
Subject: [PATCH] aarch64: Add mode size check on LDAPR-extend patterns

Add an extra safety check as suggested by Richard.
Tested on aarch64-none-linux-gnu.

gcc/ChangeLog:

	* config/aarch64/atomics.md (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
	Add mode size check to condition.
	(*aarch64_atomic_load<ALLX:mode>_rcpc_sext): Likewise.
---
 gcc/config/aarch64/atomics.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/aarch64/atomics.md b/gcc/config/aarch64/atomics.md
index 9670bef7d8c..1805012c9e9 100644
--- a/gcc/config/aarch64/atomics.md
+++ b/gcc/config/aarch64/atomics.md
@@ -711,7 +711,7 @@
         [(match_operand:ALLX 1 "aarch64_sync_memory_operand" "Q")
          (match_operand:SI 2 "const_int_operand")]			;; model
        UNSPECV_LDAP)))]
-  "TARGET_RCPC"
+  "TARGET_RCPC && (<GPI:sizen> > <ALLX:sizen>)"
   "ldapr<ALLX:atomic_sfx>\t%<GPI:w>0, %1"
 )
 
@@ -722,7 +722,7 @@
         [(match_operand:ALLX 1 "aarch64_sync_memory_operand" "Q")
          (match_operand:SI 2 "const_int_operand")]			;; model
        UNSPECV_LDAP)))]
-  "TARGET_RCPC"
+  "TARGET_RCPC && (<GPI:sizen> > <ALLX:sizen>)"
   "ldaprs<ALLX:atomic_sfx>\t%<GPI:w>0, %1"
 )