[gcse] PR rtl-optimization/69886: Check target mode in can_assign_to_reg_without_clobbers_p
PR rtl-optimization/69886 * gcse.c (can_assign_to_reg_without_clobbers_p): Accept mode argument. Use it when checking validity of set instructions. (want_to_gcse_p): Pass mode to can_assign_to_reg_without_clobbers_p. (compute_ld_motion_mems): Update can_assign_to_reg_without_clobbers_p callsite. * rtl.h (can_assign_to_reg_without_clobbers_p): Update prototype. * store-motion.c (find_moveable_store): Update can_assign_to_reg_without_clobbers_p callsite. * gcc.dg/torture/pr69886.c: New test. From-SVN: r233662
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6 changed files with 45 additions and 11 deletions
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@ -1,3 +1,15 @@
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2016-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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PR rtl-optimization/69886
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* gcse.c (can_assign_to_reg_without_clobbers_p): Accept mode
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argument. Use it when checking validity of set instructions.
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(want_to_gcse_p): Pass mode to can_assign_to_reg_without_clobbers_p.
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(compute_ld_motion_mems): Update can_assign_to_reg_without_clobbers_p
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callsite.
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* rtl.h (can_assign_to_reg_without_clobbers_p): Update prototype.
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* store-motion.c (find_moveable_store): Update
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can_assign_to_reg_without_clobbers_p callsite.
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2016-02-24 Richard Biener <rguenther@suse.de>
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PR middle-end/68963
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19
gcc/gcse.c
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gcc/gcse.c
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@ -810,7 +810,7 @@ want_to_gcse_p (rtx x, machine_mode mode, int *max_distance_ptr)
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*max_distance_ptr = max_distance;
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}
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return can_assign_to_reg_without_clobbers_p (x);
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return can_assign_to_reg_without_clobbers_p (x, mode);
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}
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}
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@ -818,9 +818,9 @@ want_to_gcse_p (rtx x, machine_mode mode, int *max_distance_ptr)
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static GTY(()) rtx_insn *test_insn;
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/* Return true if we can assign X to a pseudo register such that the
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resulting insn does not result in clobbering a hard register as a
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side-effect.
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/* Return true if we can assign X to a pseudo register of mode MODE
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such that the resulting insn does not result in clobbering a hard
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register as a side-effect.
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Additionally, if the target requires it, check that the resulting insn
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can be copied. If it cannot, this means that X is special and probably
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@ -831,14 +831,14 @@ static GTY(()) rtx_insn *test_insn;
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maybe live hard regs. */
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bool
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can_assign_to_reg_without_clobbers_p (rtx x)
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can_assign_to_reg_without_clobbers_p (rtx x, machine_mode mode)
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{
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int num_clobbers = 0;
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int icode;
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bool can_assign = false;
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/* If this is a valid operand, we are OK. If it's VOIDmode, we aren't. */
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if (general_operand (x, GET_MODE (x)))
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if (general_operand (x, mode))
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return 1;
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else if (GET_MODE (x) == VOIDmode)
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return 0;
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@ -857,7 +857,7 @@ can_assign_to_reg_without_clobbers_p (rtx x)
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/* Now make an insn like the one we would make when GCSE'ing and see if
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valid. */
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PUT_MODE (SET_DEST (PATTERN (test_insn)), GET_MODE (x));
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PUT_MODE (SET_DEST (PATTERN (test_insn)), mode);
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SET_SRC (PATTERN (test_insn)) = x;
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icode = recog (PATTERN (test_insn), test_insn, &num_clobbers);
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@ -3830,12 +3830,13 @@ compute_ld_motion_mems (void)
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if (MEM_P (dest) && simple_mem (dest))
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{
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ptr = ldst_entry (dest);
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machine_mode src_mode = GET_MODE (src);
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if (! MEM_P (src)
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&& GET_CODE (src) != ASM_OPERANDS
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/* Check for REG manually since want_to_gcse_p
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returns 0 for all REGs. */
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&& can_assign_to_reg_without_clobbers_p (src))
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&& can_assign_to_reg_without_clobbers_p (src,
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src_mode))
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ptr->stores = alloc_INSN_LIST (insn, ptr->stores);
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else
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ptr->invalid = 1;
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@ -3592,7 +3592,7 @@ extern void init_lower_subreg (void);
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/* In gcse.c */
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extern bool can_copy_p (machine_mode);
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extern bool can_assign_to_reg_without_clobbers_p (rtx);
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extern bool can_assign_to_reg_without_clobbers_p (rtx, machine_mode);
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extern rtx fis_get_condition (rtx_insn *);
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/* In ira.c */
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@ -557,7 +557,8 @@ find_moveable_store (rtx_insn *insn, int *regs_set_before, int *regs_set_after)
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assumes that we can do this. But sometimes the target machine has
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oddities like MEM read-modify-write instruction. See for example
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PR24257. */
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if (!can_assign_to_reg_without_clobbers_p (SET_SRC (set)))
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if (!can_assign_to_reg_without_clobbers_p (SET_SRC (set),
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GET_MODE (SET_SRC (set))))
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return;
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ptr = st_expr_entry (dest);
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@ -1,3 +1,8 @@
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2016-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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PR rtl-optimization/69886
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* gcc.dg/torture/pr69886.c: New test.
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2016-02-24 Richard Biener <rguenther@suse.de>
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PR middle-end/68963
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15
gcc/testsuite/gcc.dg/torture/pr69886.c
Normal file
15
gcc/testsuite/gcc.dg/torture/pr69886.c
Normal file
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/* PR rtl-optimization/69886. */
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/* { dg-do compile } */
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/* { dg-options "--param=gcse-unrestricted-cost=0" } */
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/* { dg-additional-options "-mavx" { target { i?86-*-* x86_64-*-* } } } */
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typedef unsigned v32su __attribute__ ((vector_size (32)));
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unsigned
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foo (v32su v32su_0, v32su v32su_1, v32su v32su_2, v32su v32su_3, v32su v32su_4)
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{
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v32su_3 += v32su_2 *= v32su_2[3];
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if (v32su_4[3])
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v32su_2 &= (v32su){ v32su_1[3], 0xbb72, 64 };
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return v32su_0[2] + v32su_2[4] + v32su_3[1];
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}
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