aarch64: Allow moves after tied-register intrinsics (2nd edition)
I missed these two in g:4ff89f10ca0d41f9cfa76 because I was testing on a system that didn't support big-endian compilation. Testing on aarch64_be-elf shows no other related failures (although the overall results are worse than for little-endian). gcc/testsuite/ * gcc.target/aarch64/advsimd-intrinsics/bfdot-2.c: Allow mves to occur after the intrinsic instruction, rather than requiring them to happen before. * gcc.target/aarch64/advsimd-intrinsics/vdot-3-2.c: Likewise.
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@ -70,8 +70,13 @@ float32x4_t ufooq_lane(float32x4_t r, bfloat16x8_t x, bfloat16x4_t y)
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/*
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**ufoo_untied:
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** (
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** mov v0.8b, v1.8b
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** bfdot v0.2s, (v2.4h, v3.4h|v3.4h, v2.4h)
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** |
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** bfdot v1.2s, (v2.4h, v3.4h|v3.4h, v2.4h)
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** mov v0.8b, v1.8b
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** )
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** ret
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*/
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float32x2_t ufoo_untied(float32x4_t unused, float32x2_t r, bfloat16x4_t x, bfloat16x4_t y)
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@ -81,8 +86,13 @@ float32x2_t ufoo_untied(float32x4_t unused, float32x2_t r, bfloat16x4_t x, bfloa
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/*
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**ufooq_lane_untied:
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** (
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** mov v0.16b, v1.16b
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** bfdot v0.4s, v2.8h, v3.2h\[1\]
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** |
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** bfdot v1.4s, v2.8h, v3.2h\[1\]
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** mov v0.16b, v1.16b
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** )
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** ret
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*/
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float32x4_t ufooq_lane_untied(float32x4_t unused, float32x4_t r, bfloat16x8_t x, bfloat16x4_t y)
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@ -115,8 +115,13 @@ int32x4_t sfooq_laneq (int32x4_t r, int8x16_t x, uint8x16_t y)
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/*
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**ufoo_untied:
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** (
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** mov v0\.8b, v1\.8b
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** usdot v0\.2s, v2\.8b, v3\.8b
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** |
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** usdot v1\.2s, v2\.8b, v3\.8b
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** mov v0\.8b, v1\.8b
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** )
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** ret
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*/
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int32x2_t ufoo_untied (int32x2_t unused, int32x2_t r, uint8x8_t x, int8x8_t y)
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@ -126,8 +131,13 @@ int32x2_t ufoo_untied (int32x2_t unused, int32x2_t r, uint8x8_t x, int8x8_t y)
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/*
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**ufooq_laneq_untied:
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** (
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** mov v0\.16b, v1\.16b
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** usdot v0\.4s, v2\.16b, v3\.4b\[3\]
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** |
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** usdot v1\.4s, v2\.16b, v3\.4b\[3\]
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** mov v0\.16b, v1\.16b
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** )
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** ret
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*/
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int32x4_t ufooq_laneq_untied (int32x2_t unused, int32x4_t r, uint8x16_t x, int8x16_t y)
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