ChangeLog: Follow spelling conventions.
* ChangeLog: Follow spelling conventions. * ChangeLog.0: Likewise. * ChangeLog.1: Likewise. * ChangeLog.2: Likewise. * ChangeLog.3: Likewise. * ChangeLog.4: Likewise. * ChangeLog.5: Likewise. * ChangeLog.6: Likewise. * FSFChangeLog.10: Likewise. * FSFChangeLog.11: Likewise. * c-common.c: Likewise. * c-common.h: Likewise. * c-format.c: Likewise. * c-opts.c: Likewise. * cpplib.c: Likewise. * langhooks.h: Likewise. * real.c: Likewise. * reg-stack.c: Likewise. * toplev.c: Likewise. * config/arm/arm.c: Likewise. * config/arm/arm.md: Likewise. * config/arm/linux-gas.h: Likewise. * config/arm/netbsd.h: Likewise. * config/c4x/c4x.c: Likewise. * config/c4x/c4x.h: Likewise. * config/c4x/c4x.md: Likewise. * config/c4x/libgcc.S: Likewise. * config/fr30/fr30.md: Likewise. * config/frv/frv.md: Likewise. * config/ia64/ia64.md: Likewise. * config/mips/mips.h: Likewise. * config/mn10300/mn10300.c: Likewise. * config/stormy16/stormy16.c: Likewise. * config/v850/v850.md: Likewise. * doc/extend.texi: Likewise. * doc/invoke.texi: Likewise. * doc/md.texi: Likewise. From-SVN: r57166
This commit is contained in:
parent
3baab4840e
commit
05713b80e0
37 changed files with 102 additions and 62 deletions
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@ -1,3 +1,43 @@
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2002-09-15 Kazu Hirata <kazu@cs.umass.edu>
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* ChangeLog: Follow spelling conventions.
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* ChangeLog.0: Likewise.
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* ChangeLog.1: Likewise.
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* ChangeLog.2: Likewise.
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* ChangeLog.3: Likewise.
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* ChangeLog.4: Likewise.
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* ChangeLog.5: Likewise.
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* ChangeLog.6: Likewise.
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* FSFChangeLog.10: Likewise.
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* FSFChangeLog.11: Likewise.
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* c-common.c: Likewise.
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* c-common.h: Likewise.
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* c-format.c: Likewise.
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* c-opts.c: Likewise.
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* cpplib.c: Likewise.
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* langhooks.h: Likewise.
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* real.c: Likewise.
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* reg-stack.c: Likewise.
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* toplev.c: Likewise.
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* config/arm/arm.c: Likewise.
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* config/arm/arm.md: Likewise.
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* config/arm/linux-gas.h: Likewise.
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* config/arm/netbsd.h: Likewise.
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* config/c4x/c4x.c: Likewise.
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* config/c4x/c4x.h: Likewise.
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* config/c4x/c4x.md: Likewise.
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* config/c4x/libgcc.S: Likewise.
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* config/fr30/fr30.md: Likewise.
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* config/frv/frv.md: Likewise.
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* config/ia64/ia64.md: Likewise.
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* config/mips/mips.h: Likewise.
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* config/mn10300/mn10300.c: Likewise.
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* config/stormy16/stormy16.c: Likewise.
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* config/v850/v850.md: Likewise.
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* doc/extend.texi: Likewise.
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* doc/invoke.texi: Likewise.
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* doc/md.texi: Likewise.
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2002-09-15 Jason Thorpe <thorpej@wasabisystems.com>
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* config/netbsd.h (LIB_SPEC): Include the appropriate pthread
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@ -9823,7 +9863,7 @@ Tue Jun 4 19:29:42 CEST 2002 Jan Hubicka <jh@suse.cz>
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(gt_ggc_m_tree_node): Likewise.
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* varasm.c (copy_constant): Call expand_constant if we hit
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something we can't recognise.
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something we can't recognize.
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* ggc-common.c (ggc_mark_rtvec_children): Delete.
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(ggc_mark_rtx_children): Use generic name for ggc_mark_rtvec.
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@ -24905,7 +24945,7 @@ Mon Feb 4 09:05:58 2002 Jeffrey A Law (law@redhat.com)
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* cpphash.c (_cpp_init_hashtable): Similarly.
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* cppinit.c (cpp_create_reader): Default the signed_char flag.
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(init_builtins): Define __CHAR_UNSIGNED__ appropriately.
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(COMMAND_LINE_OPTIONS): Recognise -f{un,}signed-char.
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(COMMAND_LINE_OPTIONS): Recognize -f{un,}signed-char.
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(cpp_handle_option): Handle the new options.
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* cpplex.c (cpp_interpret_charconst): Use new flag.
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* cpplib.h (struct cpp_options): New member signed_char.
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@ -12000,7 +12000,7 @@ Wed Sep 10 11:49:20 1997 Jason Merrill <jason@yorick.cygnus.com>
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EXCEPTION_SECTION, mark the start of the frame info with a
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collectible tag.
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* collect2.c (frame_tables): New list.
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(is_ctor_dtor): Recognise frame entries.
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(is_ctor_dtor): Recognize frame entries.
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(scan_prog_file): Likewise.
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(main): Pass -fno-exceptions to sub-compile. Also do collection
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if there are any frame entries.
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@ -469,7 +469,7 @@ Sun May 2 15:16:42 1999 Joseph S. Myers <jsm28@cam.ac.uk>
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(ASSEMBLER_DIALECT): Define.
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(CONDITIONAL_REGISTER_USAGE): Rename floating point registers if
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required for the UNIX assembler.
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(ASM_OUTPUT_INT): Remove. The compiler will synthesise it.
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(ASM_OUTPUT_INT): Remove. The compiler will synthesize it.
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(ASM_OUTPUT_ADDR_VEC_PROLOGUE): Remove.
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(ASM_OPEN_PAREN, ASM_CLOSE_PAREN): Change to "[" and "]".
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(TRAMPOLINE_TEMPLATE): Use ASM_OUTPUT_SHORT.
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@ -4454,7 +4454,7 @@ Mon Feb 22 19:36:33 1999 Andrew Cagney <cagney@b1.cygnus.com>
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StrongARM.
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(arm_is_6_or_7): New variable: true iff the target processor is an
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ARM6 or and ARM7.
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(arm_select): Fields reorganised.
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(arm_select): Fields reorganized.
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(struct processors): processor_type field removed.
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(all_procs): Remove.
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(all_cores): New array: Definitions of all known ARM cpu cores.
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@ -2434,10 +2434,10 @@ Thu Nov 18 11:10:03 1999 Jan Hubicka <hubicka@freesoft.cz>
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1999-11-18 Nick Clifton <nickc@cygnus.com>
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* toplev.c (main): Correctly detect an unrecognised option.
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* toplev.c (main): Correctly detect an unrecognized option.
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* cppinit.c (cpp_handle_option): Do not claim to have consumed
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a -f option if it has not been recognised.
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a -f option if it has not been recognized.
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Thu Nov 18 00:59:11 1999 Michael Gschwind <mikeg@alagoas.watson.ibm.com>
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@ -4782,7 +4782,7 @@ Tue Oct 19 15:26:11 1999 Richard Earnshaw (rearnsha@arm.com)
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Tue Oct 19 14:01:34 1999 Nick Clifton <nickc@cygnus.com>
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* toplev.c (main): Do not generate an error message if an
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unrecognised command line switch is recognisable by another
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unrecognized command line switch is recognisable by another
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language. If extra_warnings are enabled, then generate a
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warning message instead.
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@ -4960,7 +4960,7 @@ Sat Oct 16 13:42:29 1999 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
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Sat Oct 16 13:37:46 1999 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
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* config/c4x/c4x.md (movstrqi_small): Utilise parallel move
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* config/c4x/c4x.md (movstrqi_small): Utilize parallel move
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instructions.
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Sat Oct 16 13:26:47 1999 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
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@ -8316,7 +8316,7 @@ Thu Sep 9 13:46:06 1999 Geoffrey Keating <geoffk@cygnus.com>
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* cppexp.c (cpp_lex): Handle `defined (xxx)' for poisoned xxx.
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Include cpphash.h.
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* cpphash.c (special_symbol): Handle plain `xxx' for poisoned xxx.
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* cpplib.c (do_define): Generalise to handle poisoned definitions,
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* cpplib.c (do_define): Generalize to handle poisoned definitions,
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redefining poisoned identifiers, etc.
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(do_undef): Don't allow poisoned identifiers to be undefined.
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(do_pragma): Add #pragma poison.
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@ -8325,7 +8325,7 @@ Thu Sep 9 13:46:06 1999 Geoffrey Keating <geoffk@cygnus.com>
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* cccp.c: Add T_POISON node type.
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(special_symbol): Handle `defined(xxx)' and plain `xxx' for
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poisoned xxx.
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(do_define): Generalise to handle poisoned definitions,
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(do_define): Generalize to handle poisoned definitions,
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redefining poisoned identifiers, etc.
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(do_undef): Don't allow poisoned identifiers to be undefined.
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(do_pragma): Add #pragma poison.
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@ -14093,7 +14093,7 @@ Wed Jun 2 12:25:55 1999 Richard Henderson <rth@cygnus.com>
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Wed Jun 2 08:42:55 1999 Nick Clifton <nickc@cygnus.com>
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* config/arm/tcoff.h (USER_LABEL_PREFIX): Synchronise with
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* config/arm/tcoff.h (USER_LABEL_PREFIX): Synchronize with
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definition in config/arm/coff.h
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* config/arm/coff.h: Add comment about USER_LABEL_PREFIX.
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@ -10805,7 +10805,7 @@ Wed Feb 23 13:00:06 CET 2000 Jan Hubicka <jh@suse.cz>
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* gcc.c (do_spec_1): Catch the case where %* is used in a
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substitution pattern, but it has not been initialized.
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Issue a meaningful error message if an unrecognised operator
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Issue a meaningful error message if an unrecognized operator
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is encountered in a spec string.
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2000-03-14 Richard Earnshaw <rearnsha@arm.com>
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@ -142,7 +142,7 @@
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* c-parse.in (select_or_iter_stmt): Use truthvalue_conversion
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on the condition of a FOR statement, so that it gets typechecked
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and optimised.
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and optimized.
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2000-12-29 Alexandre Oliva <aoliva@redhat.com>
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@ -11536,7 +11536,7 @@ Mon Jan 29 20:38:19 2001 Christopher Faylor <cgf@cygnus.com>
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2001-01-27 Michael Sokolov <msokolov@ivan.Harhan.ORG>
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* fixproto: Correctly install synthesised unistd.h and stdlib.h when
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* fixproto: Correctly install synthesized unistd.h and stdlib.h when
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they didn't need fixing.
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2001-01-27 Janis Johnson <janis@us.ibm.com>
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@ -11922,7 +11922,7 @@ Sun Jan 21 09:44:17 2001 Denis Chertykov <denisc@overta.ru>
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* config/avr/avr.c (ret_cond_branch): New argument (reverse) added.
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If REVERSE nonzero then condition code in X must be reversed.
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(encode_section_info): Optimise if/else.
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(encode_section_info): Optimize if/else.
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(avr_function_value): Fix formatting.
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* config/avr/avr.md (branch): Call to ret_cond_branch changed.
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@ -995,7 +995,7 @@ Mon Dec 17 18:27:52 CET 2001 Jan Hubicka <jh@suse.cz>
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Mon Dec 17 17:57:05 CET 2001 Jan Hubicka <jh@suse.cz>
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* Makefile.in (cfgcleanup.o): Add cselib.h dependancy.
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* Makefile.in (cfgcleanup.o): Add cselib.h dependency.
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* basic-block.h (CLEANUP_THREADING): New constant.
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* cfgcleanup.c: Include cselib.h
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(thread_jump, mark_effect): New functions.
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@ -8552,7 +8552,7 @@ Tue Apr 25 18:52:43 1995 Stephen R. van den Berg (berg@pool.informatik.rwth-aa
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Delete the no_live_regs shortcut to save space.
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Use stackentry state to determine filled registers.
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(replace_reg): Accept COMPLEX_FLOAT as well.
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(move_for_stack_reg): Optimise away some pointer dereferencing.
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(move_for_stack_reg): Optimize away some pointer dereferencing.
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(subst_stack_regs): Make sure the stack is in the right order
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and of the right size for register passing.
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(goto_block_pat): Make sure the stack is in the right order
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@ -2636,7 +2636,7 @@ Wed Sep 10 11:49:20 1997 Jason Merrill <jason@yorick.cygnus.com>
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EXCEPTION_SECTION, mark the start of the frame info with a
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collectable tag.
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* collect2.c (frame_tables): New list.
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(is_ctor_dtor): Recognise frame entries.
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(is_ctor_dtor): Recognize frame entries.
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(scan_prog_file): Likewise.
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(main): Pass -fno-exceptions to sub-compile. Also do collection
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if there are any frame entries.
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@ -3948,7 +3948,7 @@ Sun Aug 3 21:57:31 1997 Jim Meyering <meyering@eng.ascend.com>
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Sun Aug 3 21:54:51 1997 Nick Burrett <n.a.burrett@btinternet.com>
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* cpplib.c (cpp_start_read): Recognise suffixes 'cp' and 'c++'.
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* cpplib.c (cpp_start_read): Recognize suffixes 'cp' and 'c++'.
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Sun Aug 3 19:18:27 1997 Ralf Baechle <ralf@uni-koblenz.de>
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@ -303,7 +303,7 @@ int warn_char_subscripts;
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int warn_conversion;
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/* Warn about #pragma directives that are not recognised. */
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/* Warn about #pragma directives that are not recognized. */
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int warn_unknown_pragmas; /* Tri state variable. */
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@ -4947,7 +4947,7 @@ builtin_define_float_constants (name_prefix, fp_suffix, type)
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sprintf (name, "__%s_DIG__", name_prefix);
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builtin_define_with_int_value (name, dig);
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/* The minimum negative int x such that b**(x-1) is a normalised float. */
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/* The minimum negative int x such that b**(x-1) is a normalized float. */
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sprintf (name, "__%s_MIN_EXP__", name_prefix);
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sprintf (buf, "(%d)", min_exp);
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builtin_define_with_value (name, buf, 0);
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@ -477,7 +477,7 @@ extern int warn_char_subscripts;
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extern int warn_conversion;
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/* Warn about #pragma directives that are not recognised. */
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/* Warn about #pragma directives that are not recognized. */
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extern int warn_unknown_pragmas; /* Tri state variable. */
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@ -286,7 +286,7 @@ decode_format_attr (args, info, validated_p)
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/* Check a call to a format function against a parameter list. */
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/* The meaningfully distinct length modifiers for format checking recognised
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/* The meaningfully distinct length modifiers for format checking recognized
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by GCC. */
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enum format_lengths
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{
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@ -1199,7 +1199,7 @@ c_common_decode_option (argc, argv)
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break;
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case OPT_ftabstop:
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/* Don't recognise -fno-tabstop=. */
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/* Don't recognize -fno-tabstop=. */
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if (!on)
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return 0;
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@ -1640,7 +1640,7 @@ set_Wimplicit (on)
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}
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/* Args to -d specify what to dump. Silently ignore
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unrecognised options; they may be aimed at toplev.c. */
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unrecognized options; they may be aimed at toplev.c. */
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static void
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handle_OPT_d (arg)
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const char *arg;
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@ -831,7 +831,7 @@ arm_isr_value (argument)
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if (streq (arg, ptr->arg))
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return ptr->return_value;
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/* An unrecognised interrupt type. */
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/* An unrecognized interrupt type. */
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return ARM_FT_UNKNOWN;
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}
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@ -1034,7 +1034,7 @@ arm_split_constant (code, mode, val, target, source, subtargets)
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&& REGNO (target) != REGNO (source)))
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{
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/* After arm_reorg has been called, we can't fix up expensive
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constants by pushing them into memory so we must synthesise
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constants by pushing them into memory so we must synthesize
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them in-line, regardless of the cost. This is only likely to
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be more costly on chips that have load delay slots and we are
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compiling without running the scheduler (so no splitting
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@ -7859,7 +7859,7 @@ emit_multi_reg_push (mask)
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num_dwarf_regs--;
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/* For the body of the insn we are going to generate an UNSPEC in
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parallel with several USEs. This allows the insn to be recognised
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parallel with several USEs. This allows the insn to be recognized
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by the push_multi pattern in the arm.md file. The insn looks
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something like this:
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@ -3913,7 +3913,7 @@
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;; DONE;
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;;}")
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;; Recognise garbage generated above.
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;; Recognize garbage generated above.
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;;(define_insn ""
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;; [(set (match_operand:TI 0 "general_operand" "=r,r,r,<,>,m")
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|
@ -4682,7 +4682,7 @@
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"
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)
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;; Pattern to recognise insn generated default case above
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;; Pattern to recognize insn generated default case above
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(define_insn "*movhi_insn_arch4"
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[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r")
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(match_operand:HI 1 "general_operand" "rI,K,r,m"))]
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|
|
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@ -45,7 +45,7 @@ Boston, MA 02111-1307, USA. */
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#undef WCHAR_TYPE_SIZE
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#define WCHAR_TYPE_SIZE BITS_PER_WORD
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/* Emit code to set up a trampoline and synchronise the caches. */
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/* Emit code to set up a trampoline and synchronize the caches. */
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#undef INITIALIZE_TRAMPOLINE
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#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
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{ \
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|
|
@ -148,7 +148,7 @@ Boston, MA 02111-1307, USA. */
|
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#undef DEFAULT_STRUCTURE_SIZE_BOUNDARY
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#define DEFAULT_STRUCTURE_SIZE_BOUNDARY 8
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/* Emit code to set up a trampoline and synchronise the caches. */
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/* Emit code to set up a trampoline and synchronize the caches. */
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#undef INITIALIZE_TRAMPOLINE
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#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
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{ \
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|
|
|
@ -1469,7 +1469,7 @@ c4x_check_legit_addr (mode, addr, strict)
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switch (code)
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{
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/* Register indirect with auto increment/decrement. We don't
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allow SP here---push_operand should recognise an operand
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allow SP here---push_operand should recognize an operand
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being pushed on the stack. */
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case PRE_DEC:
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|
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|
@ -1470,7 +1470,7 @@ CUMULATIVE_ARGS;
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Note that we return, rather than break so that rtx_cost doesn't
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include CONST_COSTS otherwise expand_mult will think that it is
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cheaper to synthesise a multiply rather than to use a multiply
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cheaper to synthesize a multiply rather than to use a multiply
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instruction. I think this is because the algorithm synth_mult
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doesn't take into account the loading of the operands, whereas the
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calculation of mult_cost does.
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|
|
|
@ -29,7 +29,7 @@
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; for QImode and Pmode, whether Pmode was QImode or PQImode.
|
||||
; For addresses we wouldn't have to have a clobber of the CC
|
||||
; associated with each insn and we could use MPYI in address
|
||||
; calculations without having to synthesise a proper 32 bit multiply.
|
||||
; calculations without having to synthesize a proper 32 bit multiply.
|
||||
|
||||
; Additional C30/C40 instructions not coded:
|
||||
; CALLcond, IACK, IDLE, LDE, LDFI, LDII, LDM, NORM, RETIcond
|
||||
|
@ -1360,7 +1360,7 @@
|
|||
; If one of the operands is not a register, then we should
|
||||
; emit two insns, using a scratch register. This will produce
|
||||
; better code in loops if the source operand is invariant, since
|
||||
; the source reload can be optimised out. During reload we cannot
|
||||
; the source reload can be optimized out. During reload we cannot
|
||||
; use change_address or force_reg which will allocate new pseudo regs.
|
||||
|
||||
; Unlike most other insns, the move insns can't be split with
|
||||
|
@ -2076,7 +2076,7 @@
|
|||
{
|
||||
if (GET_CODE (operands[2]) == CONST_INT)
|
||||
{
|
||||
/* Let GCC try to synthesise the multiplication using shifts
|
||||
/* Let GCC try to synthesize the multiplication using shifts
|
||||
and adds. In most cases this will be more profitable than
|
||||
using the C3x MPYI. */
|
||||
FAIL;
|
||||
|
@ -3410,7 +3410,7 @@
|
|||
; If one of the operands is not a register, then we should
|
||||
; emit two insns, using a scratch register. This will produce
|
||||
; better code in loops if the source operand is invariant, since
|
||||
; the source reload can be optimised out. During reload we cannot
|
||||
; the source reload can be optimized out. During reload we cannot
|
||||
; use change_address or force_reg.
|
||||
(define_expand "movqf"
|
||||
[(set (match_operand:QF 0 "src_operand" "")
|
||||
|
@ -5317,7 +5317,7 @@
|
|||
; Note we have to emit a dbu instruction if there are no delay slots
|
||||
; to fill.
|
||||
; Also note that GCC will try to reverse a loop to see if it can
|
||||
; utilise this instruction. However, if there are more than one
|
||||
; utilize this instruction. However, if there are more than one
|
||||
; memory reference in the loop, it cannot guarantee that reversing
|
||||
; the loop will work :( (see check_dbra_loop() in loop.c)
|
||||
; Note that the C3x only decrements the 24 LSBs of the address register
|
||||
|
@ -5629,7 +5629,7 @@
|
|||
|
||||
; The current low overhead looping code is naff and is not failsafe
|
||||
; If you want RTPB instructions to be generated, apply the patches
|
||||
; from www.elec.canterbury.ac.nz/c4x. This will utilise the
|
||||
; from www.elec.canterbury.ac.nz/c4x. This will utilize the
|
||||
; doloop_begin and doloop_end patterns in this MD.
|
||||
(define_expand "decrement_and_branch_on_count"
|
||||
[(parallel [(set (pc)
|
||||
|
@ -7315,7 +7315,7 @@
|
|||
|
||||
; The following two peepholes remove an unecessary load
|
||||
; often found at the end of a function. These peepholes
|
||||
; could be generalised to other binary operators. They shouldn't
|
||||
; could be generalized to other binary operators. They shouldn't
|
||||
; be required if we run a post reload mop-up pass.
|
||||
(define_peephole
|
||||
[(parallel [(set (match_operand:QF 0 "ext_reg_operand" "")
|
||||
|
|
|
@ -48,7 +48,7 @@ Boston, MA 02111-1307, USA. */
|
|||
;
|
||||
; r[i + 1] = r[i] * (2.0 - v * r[i])
|
||||
;
|
||||
; The normalised error e[i] at the ith iteration is
|
||||
; The normalized error e[i] at the ith iteration is
|
||||
;
|
||||
; e[i] = (r - r[i]) / r = (1 / v - r[i]) * v = (1 - v * r[i])
|
||||
;
|
||||
|
|
|
@ -521,7 +521,7 @@
|
|||
;;{{{ Floating Point Moves
|
||||
|
||||
;; Note - Patterns for SF mode moves are compulsory, but
|
||||
;; patterns for DF are optional, as GCC can synthesise them.
|
||||
;; patterns for DF are optional, as GCC can synthesize them.
|
||||
|
||||
(define_expand "movsf"
|
||||
[(set (match_operand:SF 0 "general_operand" "")
|
||||
|
|
|
@ -1607,7 +1607,7 @@
|
|||
;; Floating Point Moves
|
||||
;;
|
||||
;; Note - Patterns for SF mode moves are compulsory, but
|
||||
;; patterns for DF are optional, as GCC can synthesise them.
|
||||
;; patterns for DF are optional, as GCC can synthesize them.
|
||||
|
||||
(define_expand "movsf"
|
||||
[(set (match_operand:SF 0 "general_operand" "")
|
||||
|
@ -2258,7 +2258,7 @@
|
|||
;; Signed conversions from a smaller integer to a larger integer
|
||||
;;
|
||||
;; These operations are optional. If they are not
|
||||
;; present GCC will synthesise them for itself
|
||||
;; present GCC will synthesize them for itself
|
||||
;; Even though frv does not provide these instructions, we define them
|
||||
;; to allow load + sign extend to be collapsed together
|
||||
(define_insn "extendqihi2"
|
||||
|
|
|
@ -766,7 +766,7 @@
|
|||
;; Floating Point Moves
|
||||
;;
|
||||
;; Note - Patterns for SF mode moves are compulsory, but
|
||||
;; patterns for DF are optional, as GCC can synthesise them.
|
||||
;; patterns for DF are optional, as GCC can synthesize them.
|
||||
|
||||
(define_expand "movsf"
|
||||
[(set (match_operand:SF 0 "general_operand" "")
|
||||
|
|
|
@ -123,7 +123,7 @@ enum block_move_type {
|
|||
BLOCK_MOVE_LAST /* generate just the last store */
|
||||
};
|
||||
|
||||
/* Information about one recognised processor. Defined here for the
|
||||
/* Information about one recognized processor. Defined here for the
|
||||
benefit of TARGET_CPU_CPP_BUILTINS. */
|
||||
struct mips_cpu_info {
|
||||
/* The 'canonical' name of the processor as far as GCC is concerned.
|
||||
|
|
|
@ -647,7 +647,7 @@ notice_update_cc (body, insn)
|
|||
}
|
||||
}
|
||||
|
||||
/* Recognise the PARALLEL rtx generated by mn10300_gen_multiple_store().
|
||||
/* Recognize the PARALLEL rtx generated by mn10300_gen_multiple_store().
|
||||
This function is for MATCH_PARALLEL and so assumes OP is known to be
|
||||
parallel. If OP is a multiple store, return a mask indicating which
|
||||
registers it saves. Return 0 otherwise. */
|
||||
|
|
|
@ -476,7 +476,7 @@ xstormy16_secondary_reload_class (class, mode, x)
|
|||
return NO_REGS;
|
||||
}
|
||||
|
||||
/* Recognise a PLUS that needs the carry register. */
|
||||
/* Recognize a PLUS that needs the carry register. */
|
||||
int
|
||||
xstormy16_carry_plus_operand (x, mode)
|
||||
rtx x;
|
||||
|
|
|
@ -851,7 +851,7 @@
|
|||
;; ??? This is very ugly. The right way to do this is to modify cmpsi so
|
||||
;; that it doesn't emit RTL, and then modify the bcc/scc patterns so that
|
||||
;; they emit RTL for the compare instruction. Unfortunately, this requires
|
||||
;; lots of changes that will be hard to sanitise. So for now, cmpsi still
|
||||
;; lots of changes that will be hard to sanitize. So for now, cmpsi still
|
||||
;; emits RTL, and I get the compare operands here from the previous insn.
|
||||
|
||||
(define_expand "movsicc"
|
||||
|
|
|
@ -367,7 +367,7 @@ _cpp_handle_directive (pfile, indented)
|
|||
if (dname->val.node->directive_index)
|
||||
dir = &dtable[dname->val.node->directive_index - 1];
|
||||
}
|
||||
/* We do not recognise the # followed by a number extension in
|
||||
/* We do not recognize the # followed by a number extension in
|
||||
assembler code. */
|
||||
else if (dname->type == CPP_NUMBER && CPP_OPTION (pfile, lang) != CLK_ASM)
|
||||
{
|
||||
|
@ -1984,7 +1984,7 @@ _cpp_pop_buffer (pfile)
|
|||
}
|
||||
}
|
||||
|
||||
/* Enter all recognised directives in the hash table. */
|
||||
/* Enter all recognized directives in the hash table. */
|
||||
void
|
||||
_cpp_init_directives (pfile)
|
||||
cpp_reader *pfile;
|
||||
|
|
|
@ -7415,7 +7415,7 @@ Floating and complex non-type template parameters have been deprecated,
|
|||
and are now removed from g++.
|
||||
|
||||
The implicit typename extension has been deprecated and will be removed
|
||||
from g++ at some point. In some cases g++ determines that a dependant
|
||||
from g++ at some point. In some cases g++ determines that a dependent
|
||||
type such as @code{TPL<T>::X} is a type without needing a
|
||||
@code{typename} keyword, contrary to the standard.
|
||||
|
||||
|
|
|
@ -5841,7 +5841,7 @@ memory a feature of the ARM architecture allows a word load to be used,
|
|||
even if the address is unaligned, and the processor core will rotate the
|
||||
data as it is being loaded. This option tells the compiler that such
|
||||
misaligned accesses will cause a MMU trap and that it should instead
|
||||
synthesise the access as a series of byte accesses. The compiler can
|
||||
synthesize the access as a series of byte accesses. The compiler can
|
||||
still use word accesses to load half-word data if it knows that the
|
||||
address is aligned to a word boundary.
|
||||
|
||||
|
@ -8589,10 +8589,10 @@ DBcond(D), instructions. This is enabled by default for the C4x. To be
|
|||
on the safe side, this is disabled for the C3x, since the maximum
|
||||
iteration count on the C3x is @math{2^{23} + 1} (but who iterates loops more than
|
||||
@math{2^{23}} times on the C3x?). Note that GCC will try to reverse a loop so
|
||||
that it can utilise the decrement and branch instruction, but will give
|
||||
that it can utilize the decrement and branch instruction, but will give
|
||||
up if there is more than one memory reference in the loop. Thus a loop
|
||||
where the loop counter is decremented can generate slightly more
|
||||
efficient code, in cases where the RPTB instruction cannot be utilised.
|
||||
efficient code, in cases where the RPTB instruction cannot be utilized.
|
||||
|
||||
@item -mdp-isr-reload
|
||||
@itemx -mparanoid
|
||||
|
|
|
@ -3533,7 +3533,7 @@ for comparisons whose argument is a @code{plus}.
|
|||
@cindex looping instruction patterns
|
||||
@cindex defining looping instruction patterns
|
||||
|
||||
Some machines have special jump instructions that can be utilised to
|
||||
Some machines have special jump instructions that can be utilized to
|
||||
make loops more efficient. A common example is the 68000 @samp{dbra}
|
||||
instruction which performs a decrement of a register and a branch if the
|
||||
result was greater than zero. Other machines, in particular digital
|
||||
|
|
|
@ -186,7 +186,7 @@ struct lang_hooks
|
|||
/* Function called with an option vector as argument, to decode a
|
||||
single option (typically starting with -f or -W or +). It should
|
||||
return the number of command-line arguments it uses if it handles
|
||||
the option, or 0 and not complain if it does not recognise the
|
||||
the option, or 0 and not complain if it does not recognize the
|
||||
option. If this function returns a negative number, then its
|
||||
absolute value is the number of command-line arguments used, but,
|
||||
in addition, no language-independent option processing should be
|
||||
|
|
|
@ -5728,7 +5728,7 @@ ibmtoe (d, e, mode)
|
|||
if (y[M] == 0 && y[M+1] == 0 && y[M+2] == 0 && y[M+3] == 0)
|
||||
y[0] = y[E] = 0;
|
||||
else
|
||||
y[E] -= 5 + enormlz (y); /* now normalise the mantissa */
|
||||
y[E] -= 5 + enormlz (y); /* now normalize the mantissa */
|
||||
/* handle change in RADIX */
|
||||
emovo (y, e);
|
||||
}
|
||||
|
|
|
@ -353,7 +353,7 @@ next_flags_user (insn)
|
|||
return NULL_RTX;
|
||||
}
|
||||
|
||||
/* Reorganise the stack into ascending numbers,
|
||||
/* Reorganize the stack into ascending numbers,
|
||||
after this insn. */
|
||||
|
||||
static void
|
||||
|
|
|
@ -4008,7 +4008,7 @@ decode_f_option (arg)
|
|||
else if (!strcmp (arg, "no-stack-limit"))
|
||||
stack_limit_rtx = NULL_RTX;
|
||||
else if (!strcmp (arg, "preprocessed"))
|
||||
/* Recognise this switch but do nothing. This prevents warnings
|
||||
/* Recognize this switch but do nothing. This prevents warnings
|
||||
about an unrecognized switch if cpplib has not been linked in. */
|
||||
;
|
||||
else
|
||||
|
|
Loading…
Add table
Reference in a new issue