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rs6000: Teach legitimate_address_p about LEN_{LOAD,STORE} [PR110248]

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This patch is to teach rs6000_legitimate_address_p to
handle the queried rtx constructed for LEN_{LOAD,STORE},
since lxvl and stxvl doesn't support x-form or ds-form,
so consider it as not legitimate when outer code is PLUS.

	PR tree-optimization/110248

gcc/ChangeLog:

	* config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
	the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
	legitimate when outer code is PLUS.
This commit is contained in:
Kewen Lin 2023-08-09 01:15:46 -05:00
parent 4a8e6fa801
commit 0412f0e374
1 changed files with 7 additions and 1 deletions
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8
gcc/config/rs6000/rs6000.cc
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@ -9885,7 +9885,7 @@ use_toc_relative_ref (rtx sym, machine_mode mode)
during assembly output. */
static bool
rs6000_legitimate_address_p (machine_mode mode, rtx x, bool reg_ok_strict,
code_helper = ERROR_MARK)
code_helper ch = ERROR_MARK)
{
bool reg_offset_p = reg_offset_addressing_ok_p (mode);
bool quad_offset_p = mode_supports_dq_form (mode);
@ -9893,6 +9893,12 @@ rs6000_legitimate_address_p (machine_mode mode, rtx x, bool reg_ok_strict,
if (TARGET_ELF && RS6000_SYMBOL_REF_TLS_P (x))
return 0;
/* lxvl and stxvl doesn't support any addressing modes with PLUS. */
if (ch.is_internal_fn ()
&& (ch == IFN_LEN_LOAD || ch == IFN_LEN_STORE)
&& GET_CODE (x) == PLUS)
return 0;
/* Handle unaligned altivec lvx/stvx type addresses. */
if (VECTOR_MEM_ALTIVEC_OR_VSX_P (mode)
&& GET_CODE (x) == AND