rs6000.md (prefetch): Make address V4SI mode so that the address is restricted to legitimate form for...
* rs6000.md (prefetch): Make address V4SI mode so that the address is restricted to legitimate form for instruction. From-SVN: r49217
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2 changed files with 11 additions and 29 deletions
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@ -1,3 +1,8 @@
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2002-01-25 David Edelsohn <edelsohn@gnu.org>
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* rs6000.md (prefetch): Make address V4SI mode so that the address
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is restricted to legitimate form for instruction.
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2002-01-25 Bob Wilson <bob.wilson@acm.org>
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* doc/install.texi (xtensa-*-elf): New target.
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@ -13854,39 +13854,16 @@
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DONE;
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}")
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(define_expand "prefetch"
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[(prefetch (match_operand 0 "address_operand" "p")
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(match_operand 1 "const_int_operand" "n")
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(match_operand 2 "const_int_operand" "n"))]
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"TARGET_POWERPC"
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"
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{
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if (TARGET_32BIT)
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emit_insn (gen_prefetchsi (operands[0], operands[1], operands[2]));
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else
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emit_insn (gen_prefetchdi (operands[0], operands[1], operands[2]));
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DONE;
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}")
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(define_insn "prefetchsi"
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[(prefetch (match_operand:SI 0 "address_operand" "r")
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(define_insn "prefetch"
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[(prefetch (match_operand:V4SI 0 "address_operand" "p")
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(match_operand:SI 1 "const_int_operand" "n")
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(match_operand:SI 2 "const_int_operand" "n"))]
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"TARGET_POWERPC && TARGET_32BIT"
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"TARGET_POWERPC"
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"*
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{
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return INTVAL (operands[1]) ? \"dcbtst 0,%0\" : \"dcbt 0,%0\";
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}"
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[(set_attr "type" "load")])
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(define_insn "prefetchdi"
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[(prefetch (match_operand:DI 0 "address_operand" "r")
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(match_operand:DI 1 "const_int_operand" "n")
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(match_operand:DI 2 "const_int_operand" "n"))]
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"TARGET_POWERPC && TARGET_64BIT"
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"*
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{
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return INTVAL (operands[1]) ? \"dcbtst 0,%0\" : \"dcbt 0,%0\";
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if (GET_CODE (operands[0]) == REG)
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return INTVAL (operands[1]) ? \"dcbtst 0,%0\" : \"dcbt 0,%0\";
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return INTVAL (operands[1]) ? \"dcbtst %a0\" : \"dcbt %a0\";
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}"
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[(set_attr "type" "load")])
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