Use mvn properly and consolidate movdi patterns.
2011-06-10 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> Richard Earnshaw <rearnsha@arm.com> * config/arm/arm.c (const_ok_for_op): Check to see if mvn can be used. * config/arm/vfp.md (*arm_movdi_vfp): Delete. (*thumb2_movdi_vfp): Delete. (*arm_movdi_vfp_cortexa8): Delete. (*movdi_vfp): Consolidate from *arm_movdi_vfp and *thumb2_movdi_vfp. (*movdi_vfp_cortexa8): Likewise. Co-Authored-By: Richard Earnshaw <rearnsha@arm.com> From-SVN: r174894
This commit is contained in:
Ramana Radhakrishnan
Ramana Radhakrishnan
parent
f93fe5a0e6
commit
0127c76f61
3 changed files with 62 additions and 85 deletions
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@ -1,3 +1,14 @@
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2011-06-10 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
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Richard Earnshaw <rearnsha@arm.com>
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* config/arm/arm.c (const_ok_for_op): Check to see
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if mvn can be used.
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* config/arm/vfp.md (*arm_movdi_vfp): Delete.
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(*thumb2_movdi_vfp): Delete.
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(*arm_movdi_vfp_cortexa8): Delete.
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(*movdi_vfp): Consolidate from *arm_movdi_vfp and *thumb2_movdi_vfp.
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(*movdi_vfp_cortexa8): Likewise.
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2011-06-10 Richard Guenther <rguenther@suse.de>
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* stor-layout.c (initialize_sizetypes): Give names to all
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@ -2231,7 +2231,8 @@ const_ok_for_op (HOST_WIDE_INT i, enum rtx_code code)
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if (arm_arch_thumb2 && (i & 0xffff0000) == 0)
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return 1;
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else
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return 0;
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/* Otherwise, try mvn. */
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return const_ok_for_arm (ARM_SIGN_EXTEND (~i));
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case PLUS:
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case COMPARE:
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@ -133,127 +133,92 @@
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;; DImode moves
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(define_insn "*arm_movdi_vfp"
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[(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, m,w,r,w,w, Uv")
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(match_operand:DI 1 "di_operand" "rIK,mi,r,r,w,w,Uvi,w"))]
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"TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP && arm_tune != cortexa8
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(define_insn "*movdi_vfp"
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[(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,r,r,r,r,m,w,r,w,w, Uv")
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(match_operand:DI 1 "di_operand" "r,rDa,Db,Dc,mi,mi,r,r,w,w,Uvi,w"))]
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"TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP && arm_tune != cortexa8
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&& ( register_operand (operands[0], DImode)
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|| register_operand (operands[1], DImode))"
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"*
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switch (which_alternative)
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{
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case 0:
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return \"#\";
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case 1:
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case 2:
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return output_move_double (operands);
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case 3:
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return \"fmdrr%?\\t%P0, %Q1, %R1\\t%@ int\";
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return \"#\";
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case 4:
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return \"fmrrd%?\\t%Q0, %R0, %P1\\t%@ int\";
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case 5:
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case 6:
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return output_move_double (operands);
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case 7:
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return \"fmdrr%?\\t%P0, %Q1, %R1\\t%@ int\";
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case 8:
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return \"fmrrd%?\\t%Q0, %R0, %P1\\t%@ int\";
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case 9:
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if (TARGET_VFP_SINGLE)
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return \"fcpys%?\\t%0, %1\\t%@ int\;fcpys%?\\t%p0, %p1\\t%@ int\";
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else
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return \"fcpyd%?\\t%P0, %P1\\t%@ int\";
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case 6: case 7:
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case 10: case 11:
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return output_move_vfp (operands);
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default:
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gcc_unreachable ();
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}
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"
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[(set_attr "type" "*,load2,store2,r_2_f,f_2_r,ffarithd,f_loadd,f_stored")
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(set_attr "neon_type" "*,*,*,neon_mcr_2_mcrr,neon_mrrc,neon_vmov,*,*")
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(set (attr "length") (cond [(eq_attr "alternative" "0,1,2") (const_int 8)
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(eq_attr "alternative" "5")
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(if_then_else
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(eq (symbol_ref "TARGET_VFP_SINGLE") (const_int 1))
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(const_int 8)
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(const_int 4))]
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(const_int 4)))
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(set_attr "pool_range" "*,1020,*,*,*,*,1020,*")
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(set_attr "neg_pool_range" "*,1008,*,*,*,*,1008,*")]
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[(set_attr "type" "*,*,*,*,load2,load2,store2,r_2_f,f_2_r,ffarithd,f_loadd,f_stored")
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(set_attr "neon_type" "*,*,*,*,*,*,*,neon_mcr_2_mcrr,neon_mrrc,neon_vmov,*,*")
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(set (attr "length") (cond [(eq_attr "alternative" "1,4,5,6") (const_int 8)
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(eq_attr "alternative" "2") (const_int 12)
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(eq_attr "alternative" "3") (const_int 16)
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(eq_attr "alternative" "9")
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(if_then_else
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(eq (symbol_ref "TARGET_VFP_SINGLE") (const_int 1))
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(const_int 8)
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(const_int 4))]
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(const_int 4)))
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(set_attr "pool_range" "*,*,*,*,1020,4096,*,*,*,*,1020,*")
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(set_attr "neg_pool_range" "*,*,*,*,1008,0,*,*,*,*,1008,*")
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(set_attr "arch" "t2,any,any,any,a,t2,any,any,any,any,any,any")]
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)
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(define_insn "*arm_movdi_vfp_cortexa8"
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[(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r,m,w,!r,w,w, Uv")
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(match_operand:DI 1 "di_operand" "rIK,mi,r,r,w,w,Uvi,w"))]
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"TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP && arm_tune == cortexa8
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&& ( register_operand (operands[0], DImode)
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|| register_operand (operands[1], DImode))"
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(define_insn "*movdi_vfp_cortexa8"
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[(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,r,r,r,r,m,w,!r,w,w, Uv")
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(match_operand:DI 1 "di_operand" "r,rDa,Db,Dc,mi,mi,r,r,w,w,Uvi,w"))]
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"TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP && arm_tune == cortexa8
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&& ( register_operand (operands[0], DImode)
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|| register_operand (operands[1], DImode))"
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"*
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switch (which_alternative)
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{
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case 0:
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return \"#\";
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case 1:
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case 2:
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return output_move_double (operands);
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case 3:
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return \"fmdrr%?\\t%P0, %Q1, %R1\\t%@ int\";
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return \"#\";
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case 4:
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return \"fmrrd%?\\t%Q0, %R0, %P1\\t%@ int\";
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case 5:
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if (TARGET_VFP_SINGLE)
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return \"fcpys%?\\t%0, %1\\t%@ int\;fcpys%?\\t%p0, %p1\\t%@ int\";
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else
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return \"fcpyd%?\\t%P0, %P1\\t%@ int\";
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case 6: case 7:
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case 6:
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return output_move_double (operands);
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case 7:
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return \"fmdrr%?\\t%P0, %Q1, %R1\\t%@ int\";
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case 8:
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return \"fmrrd%?\\t%Q0, %R0, %P1\\t%@ int\";
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case 9:
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return \"fcpyd%?\\t%P0, %P1\\t%@ int\";
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case 10: case 11:
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return output_move_vfp (operands);
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default:
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gcc_unreachable ();
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}
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"
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[(set_attr "type" "*,load2,store2,r_2_f,f_2_r,ffarithd,f_loadd,f_stored")
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(set (attr "length") (cond [(eq_attr "alternative" "0,1,2") (const_int 8)
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(eq_attr "alternative" "5")
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(if_then_else
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(eq (symbol_ref "TARGET_VFP_SINGLE")
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(const_int 1))
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(const_int 8)
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(const_int 4))]
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(const_int 4)))
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[(set_attr "type" "*,*,*,*,load2,load2,store2,r_2_f,f_2_r,ffarithd,f_loadd,f_stored")
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(set_attr "length" "4,8,12,16,8,8,8,4,4,4,4,4")
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(set_attr "predicable" "yes")
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(set_attr "pool_range" "*,1020,*,*,*,*,1020,*")
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(set_attr "neg_pool_range" "*,1008,*,*,*,*,1008,*")]
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)
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(define_insn "*thumb2_movdi_vfp"
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[(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r,m,w,r,w,w, Uv")
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(match_operand:DI 1 "di_operand" "rIK,mi,r,r,w,w,Uvi,w"))]
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"TARGET_THUMB2 && TARGET_HARD_FLOAT && TARGET_VFP"
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"*
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switch (which_alternative)
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{
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case 0: case 1: case 2:
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return (output_move_double (operands));
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case 3:
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return \"fmdrr%?\\t%P0, %Q1, %R1\\t%@ int\";
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case 4:
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return \"fmrrd%?\\t%Q0, %R0, %P1\\t%@ int\";
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case 5:
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if (TARGET_VFP_SINGLE)
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return \"fcpys%?\\t%0, %1\\t%@ int\;fcpys%?\\t%p0, %p1\\t%@ int\";
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else
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return \"fcpyd%?\\t%P0, %P1\\t%@ int\";
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case 6: case 7:
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return output_move_vfp (operands);
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default:
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abort ();
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}
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"
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[(set_attr "type" "*,load2,store2,r_2_f,f_2_r,ffarithd,f_loadd,f_stored")
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(set (attr "length") (cond [(eq_attr "alternative" "0,1,2") (const_int 8)
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(eq_attr "alternative" "5")
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(if_then_else
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(eq (symbol_ref "TARGET_VFP_SINGLE")
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(const_int 1))
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(const_int 8)
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(const_int 4))]
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(const_int 4)))
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(set_attr "pool_range" "*,4096,*,*,*,*,1020,*")
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(set_attr "neg_pool_range" "*, 0,*,*,*,*,1008,*")]
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)
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(set_attr "pool_range" "*,*,*,*,1020,4096,*,*,*,*,1020,*")
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(set_attr "neg_pool_range" "*,*,*,*,1008,0,*,*,*,*,1008,*")
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(set_attr "arch" "t2,any,any,any,a,t2,any,any,any,any,any,any")]
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)
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;; HFmode moves
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(define_insn "*movhf_vfp_neon"
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