mirror of
https://github.com/system76/firmware-open.git
synced 2025-07-03 21:03:23 +00:00
Merge branch 'darp11' of https://github.com/system76/firmware-open into darp11
This commit is contained in:
Jeremy Soller
commit
a0253b2262
5 changed files with 623 additions and 1 deletions
259
models/darp11-b/coreboot-collector.txt
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259
models/darp11-b/coreboot-collector.txt
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@ -0,0 +1,259 @@
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## PCI ##
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PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0x7D06, Revision 0x05
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PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x7D51, Revision 0x03
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PCI Device: 0000:00:04.0: Class 0x00118000, Vendor 0x8086, Device 0x7D03, Revision 0x05
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PCI Device: 0000:00:06.0: Class 0x00060400, Vendor 0x8086, Device 0x7ECA, Revision 0x10
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PCI Device: 0000:00:06.2: Class 0x00060400, Vendor 0x8086, Device 0x7ECB, Revision 0x10
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PCI Device: 0000:00:07.0: Class 0x00060400, Vendor 0x8086, Device 0x7EC4, Revision 0x10
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PCI Device: 0000:00:08.0: Class 0x00088000, Vendor 0x8086, Device 0x774C, Revision 0x00
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PCI Device: 0000:00:0a.0: Class 0x00118000, Vendor 0x8086, Device 0x7D0D, Revision 0x01
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PCI Device: 0000:00:0b.0: Class 0x00120000, Vendor 0x8086, Device 0x7D1D, Revision 0x05
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PCI Device: 0000:00:0d.0: Class 0x000C0330, Vendor 0x8086, Device 0x7EC0, Revision 0x10
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PCI Device: 0000:00:0d.2: Class 0x000C0340, Vendor 0x8086, Device 0x7EC2, Revision 0x10
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PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x777D, Revision 0x00
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PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x777F, Revision 0x00
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PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x7778, Revision 0x00
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PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0x7779, Revision 0x00
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PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x7770, Revision 0x00
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PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x773D, Revision 0x00
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PCI Device: 0000:00:1c.7: Class 0x00060400, Vendor 0x8086, Device 0x773F, Revision 0x00
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PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x7702, Revision 0x00
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PCI Device: 0000:00:1f.3: Class 0x00040380, Vendor 0x8086, Device 0x7728, Revision 0x00
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PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x7722, Revision 0x00
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PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x7723, Revision 0x00
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PCI Device: 0000:00:1f.6: Class 0x00020000, Vendor 0x8086, Device 0x550A, Revision 0x00
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PCI Device: 0000:01:00.0: Class 0x00010802, Vendor 0x1344, Device 0x5416, Revision 0x01
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PCI Device: 0000:02:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA80A, Revision 0x00
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PCI Device: 0000:2d:00.0: Class 0x00080501, Vendor 0x1217, Device 0x8621, Revision 0x01
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PCI Device: 0000:2e:00.0: Class 0x00028000, Vendor 0x8086, Device 0x272B, Revision 0x1A
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## GPIO ##
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ARL-H PCH
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GPP_V0 (0xD1,0x00) 0x40000700 0x0003c000 0x00000000 0x00000000
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GPP_V1 (0xD1,0x02) 0x40000700 0x0003c000 0x00000000 0x00000000
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GPP_V2 (0xD1,0x04) 0x40000702 0x0003c000 0x00000000 0x00000000
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GPP_V3 (0xD1,0x06) 0x40000700 0x0003c000 0x00000000 0x00000000
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GPP_V4 (0xD1,0x08) 0x40000702 0x0003c000 0x00000000 0x00000000
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GPP_V5 (0xD1,0x0A) 0x44000702 0x0003f018 0x00000000 0x00000000
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GPP_V6 (0xD1,0x0C) 0x44000702 0x0003fc19 0x00000000 0x00000000
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GPP_V7 (0xD1,0x0E) 0x44000702 0x0003fc1a 0x00000000 0x00000000
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GPP_V8 (0xD1,0x10) 0x44000702 0x0003f01b 0x00000000 0x00000000
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GPP_V9 (0xD1,0x12) 0x44000600 0x0003c01c 0x00000000 0x00000000
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GPP_V10 (0xD1,0x14) 0x44000600 0x0003c01d 0x00000000 0x00000000
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GPP_V11 (0xD1,0x16) 0x44000600 0x0003c01e 0x00000000 0x00000000
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GPP_V12 (0xD1,0x18) 0x44000200 0x0000001f 0x00000000 0x00000000
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GPP_V13 (0xD1,0x1A) 0x44000600 0x0003c020 0x00000000 0x00000000
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GPP_V14 (0xD1,0x1C) 0x44000600 0x0003c021 0x00000000 0x00000000
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GPP_V15 (0xD1,0x1E) 0x44000600 0x0003c022 0x00000000 0x00000000
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GPP_V16 (0xD1,0x20) 0x44000600 0x0003c023 0x00000000 0x00000000
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GPP_V17 (0xD1,0x22) 0x44000602 0x0003c024 0x00000000 0x00000000
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GPP_V18 (0xD1,0x24) 0x44000200 0x00000025 0x00000000 0x00000000
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GPP_V19 (0xD1,0x26) 0x44000602 0x0003c026 0x00000000 0x00000000
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GPP_V20 (0xD1,0x28) 0x44000200 0x00000027 0x00000000 0x00000000
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GPP_V21 (0xD1,0x2A) 0x44000200 0x00000028 0x00000000 0x00000000
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GPP_V22 (0xD1,0x2C) 0x44000200 0x00000029 0x00000000 0x00000000
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GPP_V23 (0xD1,0x2E) 0x44000200 0x0000002a 0x00000000 0x00000000
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GPP_C0 (0xD1,0x30) 0x44000600 0x0003c02b 0x00000000 0x00000000
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GPP_C1 (0xD1,0x32) 0x44000602 0x0003c02c 0x00000000 0x00000000
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GPP_C2 (0xD1,0x34) 0x44000600 0x0003c02d 0x00000000 0x00000000
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GPP_C3 (0xD1,0x36) 0x44000200 0x0003c02e 0x00000000 0x00000000
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GPP_C4 (0xD1,0x38) 0x44000200 0x0003c02f 0x00000000 0x00000000
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GPP_C5 (0xD1,0x3A) 0x44000702 0x0003f030 0x00000000 0x00000000
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GPP_C6 (0xD1,0x3C) 0x44000702 0x0003f031 0x00000000 0x00000000
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GPP_C7 (0xD1,0x3E) 0x44000200 0x00000032 0x00000800 0x00000000
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GPP_C8 (0xD1,0x40) 0x44000702 0x0003c033 0x00000000 0x00000000
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GPP_C9 (0xD1,0x42) 0x44000702 0x0003c034 0x00000000 0x00000000
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GPP_C10 (0xD1,0x44) 0x44000200 0x00000035 0x00000000 0x00000000
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GPP_C11 (0xD1,0x46) 0x04000702 0x0003c036 0x00000000 0x00000000
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GPP_C12 (0xD1,0x48) 0x04000702 0x0003c037 0x00000000 0x00000000
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GPP_C13 (0xD1,0x4A) 0x44000200 0x00000038 0x00000000 0x00000000
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GPP_C14 (0xD1,0x4C) 0x44000200 0x00000039 0x00000000 0x00000000
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GPP_C15 (0xD1,0x4E) 0x44000200 0x0000003a 0x00000000 0x00000000
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GPP_C16 (0xD1,0x50) 0x84000700 0x0000003b 0x00000000 0x00000000
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GPP_C17 (0xD1,0x52) 0x84000702 0x0000003c 0x00000000 0x00000000
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GPP_C18 (0xD1,0x54) 0x44000200 0x0000003d 0x00000000 0x00000000
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GPP_C19 (0xD1,0x56) 0x44000200 0x0000003e 0x00000000 0x00000000
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GPP_C20 (0xD1,0x58) 0x44000200 0x0000003f 0x00000000 0x00000000
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GPP_C21 (0xD1,0x5A) 0x44000700 0x00024040 0x00000000 0x00000000
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GPP_C22 (0xD1,0x5C) 0x44000700 0x00024041 0x00000000 0x00000000
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GPP_C23 (0xD1,0x5E) 0x44000600 0x00024042 0x00000000 0x00000000
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GPP_A0 (0xD2,0x00) 0x44000700 0x0003f048 0x00000000 0x00000000
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GPP_A1 (0xD2,0x02) 0x44000702 0x0003f049 0x00000000 0x00000000
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GPP_A2 (0xD2,0x04) 0x44000700 0x0003f04a 0x00000000 0x00000000
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GPP_A3 (0xD2,0x06) 0x44000700 0x0003f04b 0x00000000 0x00000000
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GPP_A4 (0xD2,0x08) 0x44000700 0x0003f04c 0x00000000 0x00000000
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GPP_A5 (0xD2,0x0A) 0x44000700 0x0003f04d 0x00000000 0x00000000
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GPP_A6 (0xD2,0x0C) 0x44000700 0x0003c04e 0x00000000 0x00000000
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GPP_A7 (0xD2,0x0E) 0x44000200 0x0000004f 0x00000000 0x00000000
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GPP_A8 (0xD2,0x10) 0x44000200 0x00000050 0x00000000 0x00000000
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GPP_A9 (0xD2,0x12) 0x44000200 0x00000051 0x00000000 0x00000000
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GPP_A10 (0xD2,0x14) 0x44000200 0x00000052 0x00000000 0x00000000
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GPP_A11 (0xD2,0x16) 0x44000200 0x00000053 0x00000000 0x00000000
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GPP_A12 (0xD2,0x18) 0x44000102 0x00000054 0x00000000 0x00000000
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GPP_A13 (0xD2,0x1A) 0x84000201 0x00003055 0x00000000 0x00000000
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GPP_A14 (0xD2,0x1C) 0x44000200 0x00000056 0x00000000 0x00000000
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GPP_A15 (0xD2,0x1E) 0x44000200 0x00000057 0x00000000 0x00000000
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GPP_A16 (0xD2,0x20) 0x44000702 0x0003f058 0x00000000 0x00000000
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GPP_A17 (0xD2,0x22) 0x44000200 0x00000059 0x00000000 0x00000000
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GPP_A18 (0xD2,0x24) 0x44000200 0x0000005a 0x00000000 0x00000000
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GPP_A19 (0xD2,0x26) 0x44000200 0x0000005b 0x00000000 0x00000000
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GPP_A20 (0xD2,0x28) 0x44000200 0x0000005c 0x00000000 0x00000000
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GPP_A21 (0xD2,0x2A) 0x44000702 0x0003fc5d 0x00000000 0x00000000
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GPP_E0 (0xD2,0x32) 0x44000200 0x00000060 0x00000000 0x00000000
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GPP_E1 (0xD2,0x34) 0x40100102 0x00003061 0x00000000 0x00000000
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GPP_E2 (0xD2,0x36) 0x44000102 0x00000062 0x00000000 0x00000000
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GPP_E3 (0xD2,0x38) 0x44000102 0x00000063 0x00000000 0x00000000
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GPP_E4 (0xD2,0x3A) 0x44000200 0x00000064 0x00000000 0x00000000
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GPP_E5 (0xD2,0x3C) 0x44000200 0x00000065 0x00000000 0x00000000
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GPP_E6 (0xD2,0x3E) 0x44000200 0x00000066 0x00000800 0x00000000
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GPP_E7 (0xD2,0x40) 0x44000200 0x00000067 0x00000000 0x00000000
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GPP_E8 (0xD2,0x42) 0x44000200 0x00000068 0x00000000 0x00000000
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GPP_E9 (0xD2,0x44) 0x44000102 0x00000069 0x00000800 0x00000000
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GPP_E10 (0xD2,0x46) 0x44000200 0x0000006a 0x00000000 0x00000000
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GPP_E11 (0xD2,0x48) 0x44000102 0x0000006b 0x00000000 0x00000000
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GPP_E12 (0xD2,0x4A) 0x44000200 0x0000006c 0x00000000 0x00000000
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GPP_E13 (0xD2,0x4C) 0x44000200 0x0000006d 0x00000000 0x00000000
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GPP_E14 (0xD2,0x4E) 0x44000702 0x0002406e 0x00000000 0x00000000
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GPP_E15 (0xD2,0x50) 0x44000200 0x0000006f 0x00000000 0x00000000
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GPP_E16 (0xD2,0x52) 0x44000b02 0x0003c070 0x00000000 0x00000000
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GPP_E17 (0xD2,0x54) 0x44000200 0x00000071 0x00000000 0x00000000
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GPP_E18 (0xD2,0x56) 0x44000200 0x00000072 0x00000000 0x00000000
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GPP_E19 (0xD2,0x58) 0x44000200 0x00000073 0x00000000 0x00000000
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GPP_E20 (0xD2,0x5A) 0x44000200 0x00000074 0x00000000 0x00000000
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GPP_E21 (0xD2,0x5C) 0x44000200 0x00000075 0x00000000 0x00000000
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GPP_E22 (0xD2,0x5E) 0x44000200 0x00000076 0x00000000 0x00000000
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GPP_H0 (0xD3,0x00) 0x44000200 0x00000018 0x00000000 0x00000000
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GPP_H1 (0xD3,0x02) 0x44000200 0x00000019 0x00000000 0x00000000
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GPP_H2 (0xD3,0x04) 0x44000200 0x0000001a 0x00000000 0x00000000
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GPP_H3 (0xD3,0x06) 0x44000200 0x0000001b 0x00000000 0x00000000
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GPP_H4 (0xD3,0x08) 0x44000200 0x0000001c 0x00000000 0x00000000
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GPP_H5 (0xD3,0x0A) 0x44000200 0x0000001d 0x00000000 0x00000000
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GPP_H6 (0xD3,0x0C) 0x44000200 0x0000001e 0x00000000 0x00000000
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GPP_H7 (0xD3,0x0E) 0x44000200 0x0000001f 0x00000000 0x00000000
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GPP_H8 (0xD3,0x10) 0x44000200 0x00000020 0x00000000 0x00000000
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GPP_H9 (0xD3,0x12) 0x44000200 0x00000021 0x00000000 0x00000000
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GPP_H10 (0xD3,0x14) 0x44000200 0x00000022 0x00000000 0x00000000
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GPP_H11 (0xD3,0x16) 0x44000200 0x00000023 0x00000000 0x00000000
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GPP_H12 (0xD3,0x18) 0x44000200 0x00000024 0x00000000 0x00000000
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GPP_H13 (0xD3,0x1A) 0x44000600 0x0003c025 0x00000000 0x00000000
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GPP_H14 (0xD3,0x1C) 0x44000200 0x00000026 0x00000000 0x00000000
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GPP_H15 (0xD3,0x1E) 0x44000200 0x00000027 0x00000000 0x00000000
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GPP_H16 (0xD3,0x20) 0x44000200 0x00000028 0x00000000 0x00000000
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GPP_H17 (0xD3,0x22) 0x44000200 0x00000029 0x00000000 0x00000000
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GPP_H18 (0xD3,0x24) 0x44000200 0x0000002a 0x00000000 0x00000000
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GPP_H19 (0xD3,0x26) 0x44000702 0x0000002b 0x00000000 0x00000000
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GPP_H20 (0xD3,0x28) 0x44000702 0x0000002c 0x00000000 0x00000000
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GPP_H21 (0xD3,0x2A) 0x44000702 0x0000002d 0x00000000 0x00000000
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GPP_H22 (0xD3,0x2C) 0x44000602 0x0000002e 0x00000000 0x00000000
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||||||
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GPP_F0 (0xD3,0x34) 0x44000700 0x00000030 0x00000000 0x00000000
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||||||
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GPP_F1 (0xD3,0x36) 0x44000702 0x00003031 0x00000000 0x00000000
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||||||
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GPP_F2 (0xD3,0x38) 0x44000700 0x00000032 0x00000800 0x00000000
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||||||
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GPP_F3 (0xD3,0x3A) 0x44000702 0x00003033 0x00000000 0x00000000
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||||||
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GPP_F4 (0xD3,0x3C) 0x44000700 0x00000034 0x00000000 0x00000000
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||||||
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GPP_F5 (0xD3,0x3E) 0x44000d00 0x0003c035 0x00000000 0x00000000
|
||||||
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GPP_F6 (0xD3,0x40) 0x44000200 0x00000036 0x00000000 0x00000000
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||||||
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GPP_F7 (0xD3,0x42) 0x44000200 0x00000037 0x00000000 0x00000000
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||||||
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GPP_F8 (0xD3,0x44) 0x44000200 0x00000038 0x00000000 0x00000000
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||||||
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GPP_F9 (0xD3,0x46) 0x44000102 0x00000039 0x00000000 0x00000000
|
||||||
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GPP_F10 (0xD3,0x48) 0x44000200 0x0000003a 0x00000000 0x00000000
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||||||
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GPP_F11 (0xD3,0x4A) 0x44000200 0x0000003b 0x00000000 0x00000000
|
||||||
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GPP_F12 (0xD3,0x4C) 0x44002102 0x0000003c 0x00000000 0x00000000
|
||||||
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GPP_F13 (0xD3,0x4E) 0x44002102 0x0000003d 0x00000000 0x00000000
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||||||
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GPP_F14 (0xD3,0x50) 0x44000200 0x0000003e 0x00000000 0x00000000
|
||||||
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GPP_F15 (0xD3,0x52) 0x44000200 0x0000003f 0x00000000 0x00000000
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||||||
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GPP_F16 (0xD3,0x54) 0x44000200 0x00000040 0x00000000 0x00000000
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||||||
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GPP_F17 (0xD3,0x56) 0x44000200 0x00000041 0x00000000 0x00000000
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||||||
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GPP_F18 (0xD3,0x58) 0x44000200 0x00000042 0x00000000 0x00000000
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||||||
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GPP_F19 (0xD3,0x5A) 0x44000200 0x00000043 0x00000000 0x00000000
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||||||
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GPP_F20 (0xD3,0x5C) 0x44000200 0x00000044 0x00000000 0x00000000
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||||||
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GPP_F21 (0xD3,0x5E) 0x44000200 0x00000045 0x00000800 0x00000000
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GPP_F22 (0xD3,0x60) 0x44000200 0x00000046 0x00000000 0x00000000
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||||||
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GPP_F23 (0xD3,0x62) 0x44000200 0x00000047 0x00000000 0x00000000
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||||||
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GPP_S0 (0xD4,0x00) 0x44000200 0x01800050 0x00000000 0x00000000
|
||||||
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GPP_S1 (0xD4,0x02) 0x44000200 0x01800051 0x00000000 0x00000000
|
||||||
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GPP_S2 (0xD4,0x04) 0x44000200 0x01800052 0x00000000 0x00000000
|
||||||
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GPP_S3 (0xD4,0x06) 0x44000200 0x01800053 0x00000000 0x00000000
|
||||||
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GPP_S4 (0xD4,0x08) 0x44000200 0x01800054 0x00000000 0x00000000
|
||||||
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GPP_S5 (0xD4,0x0A) 0x44000200 0x01800055 0x00000000 0x00000000
|
||||||
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GPP_S6 (0xD4,0x0C) 0x44000200 0x01800056 0x00000000 0x00000000
|
||||||
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GPP_S7 (0xD4,0x0E) 0x44000200 0x01800057 0x00000000 0x00000000
|
||||||
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GPP_B0 (0xD5,0x00) 0x80800102 0x00000058 0x00000000 0x00000000
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||||||
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GPP_B1 (0xD5,0x02) 0x44000200 0x00000059 0x00000000 0x00000000
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||||||
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GPP_B2 (0xD5,0x04) 0x44000200 0x0000005a 0x00000000 0x00000000
|
||||||
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GPP_B3 (0xD5,0x06) 0x44000200 0x0000005b 0x00000000 0x00000000
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||||||
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GPP_B4 (0xD5,0x08) 0x44000200 0x0000005c 0x00000000 0x00000000
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||||||
|
GPP_B5 (0xD5,0x0A) 0x44000200 0x0000005d 0x00000000 0x00000000
|
||||||
|
GPP_B6 (0xD5,0x0C) 0x44000200 0x0000005e 0x00000000 0x00000000
|
||||||
|
GPP_B7 (0xD5,0x0E) 0x44000200 0x0000005f 0x00000000 0x00000000
|
||||||
|
GPP_B8 (0xD5,0x10) 0x44000200 0x00000060 0x00000000 0x00000000
|
||||||
|
GPP_B9 (0xD5,0x12) 0x44000200 0x00000061 0x00000000 0x00000000
|
||||||
|
GPP_B10 (0xD5,0x14) 0x44000200 0x00000062 0x00000000 0x00000000
|
||||||
|
GPP_B11 (0xD5,0x16) 0x44000b02 0x00024063 0x00000000 0x00000000
|
||||||
|
GPP_B12 (0xD5,0x18) 0x44000700 0x0003c064 0x00000000 0x00000000
|
||||||
|
GPP_B13 (0xD5,0x1A) 0x44000700 0x0003c065 0x00000000 0x00000000
|
||||||
|
GPP_B14 (0xD5,0x1C) 0x44000102 0x00000066 0x00000000 0x00000000
|
||||||
|
GPP_B15 (0xD5,0x1E) 0x44000102 0x00000067 0x00000000 0x00000000
|
||||||
|
GPP_B16 (0xD5,0x20) 0x44000200 0x00000068 0x00000000 0x00000000
|
||||||
|
GPP_B17 (0xD5,0x22) 0x44000200 0x00000069 0x00000000 0x00000000
|
||||||
|
GPP_B18 (0xD5,0x24) 0x44000201 0x0000006a 0x00000000 0x00000000
|
||||||
|
GPP_B19 (0xD5,0x26) 0x44000201 0x0000006b 0x00000000 0x00000000
|
||||||
|
GPP_B20 (0xD5,0x28) 0x44000200 0x0000006c 0x00000000 0x00000000
|
||||||
|
GPP_B21 (0xD5,0x2A) 0x84000200 0x0000006d 0x00000000 0x00000000
|
||||||
|
GPP_B22 (0xD5,0x2C) 0x44000200 0x0000006e 0x00000000 0x00000000
|
||||||
|
GPP_B23 (0xD5,0x2E) 0x44000200 0x0000006f 0x00000000 0x00000000
|
||||||
|
GPP_D0 (0xD5,0x32) 0x44000201 0x00000070 0x00000000 0x00000000
|
||||||
|
GPP_D1 (0xD5,0x34) 0x44000201 0x00000071 0x00000000 0x00000000
|
||||||
|
GPP_D2 (0xD5,0x36) 0x44000201 0x00000072 0x00000000 0x00000000
|
||||||
|
GPP_D3 (0xD5,0x38) 0x44000200 0x00000073 0x00000000 0x00000000
|
||||||
|
GPP_D4 (0xD5,0x3A) 0x44000200 0x00000074 0x00000000 0x00000000
|
||||||
|
GPP_D5 (0xD5,0x3C) 0x44000201 0x00000075 0x00000000 0x00000000
|
||||||
|
GPP_D6 (0xD5,0x3E) 0x44000200 0x00000076 0x00000000 0x00000000
|
||||||
|
GPP_D7 (0xD5,0x40) 0x44000200 0x00000077 0x00000000 0x00000000
|
||||||
|
GPP_D8 (0xD5,0x42) 0x44000200 0x00000018 0x00000000 0x00000000
|
||||||
|
GPP_D9 (0xD5,0x44) 0x44000200 0x00000019 0x00000000 0x00000000
|
||||||
|
GPP_D10 (0xD5,0x46) 0x44000600 0x0003c01a 0x00000000 0x00000000
|
||||||
|
GPP_D11 (0xD5,0x48) 0x44000700 0x0003fc1b 0x00000000 0x00000000
|
||||||
|
GPP_D12 (0xD5,0x4A) 0x44000600 0x0003fc1c 0x00000000 0x00000000
|
||||||
|
GPP_D13 (0xD5,0x4C) 0x44000700 0x0003fc1d 0x00000000 0x00000000
|
||||||
|
GPP_D14 (0xD5,0x4E) 0x44000200 0x0000001e 0x00000000 0x00000000
|
||||||
|
GPP_D15 (0xD5,0x50) 0x44000200 0x0000001f 0x00000000 0x00000000
|
||||||
|
GPP_D16 (0xD5,0x52) 0x44000200 0x00000020 0x00000000 0x00000000
|
||||||
|
GPP_D17 (0xD5,0x54) 0x44000700 0x0003c021 0x00000000 0x00000000
|
||||||
|
GPP_D18 (0xD5,0x56) 0x84000700 0x00000022 0x00000000 0x00000000
|
||||||
|
GPP_D19 (0xD5,0x58) 0x84000700 0x00000023 0x00000000 0x00000000
|
||||||
|
GPP_D20 (0xD5,0x5A) 0x84000702 0x00000024 0x00000000 0x00000000
|
||||||
|
GPP_D21 (0xD5,0x5C) 0x84000b02 0x00000025 0x00000000 0x00000000
|
||||||
|
GPP_D22 (0xD5,0x5E) 0x44000700 0x0003fc26 0x00000000 0x00000000
|
||||||
|
GPP_D23 (0xD5,0x60) 0x44000702 0x0003fc27 0x00000000 0x00000000
|
||||||
|
## HDAUDIO ##
|
||||||
|
hdaudioC0D0
|
||||||
|
vendor_name: Realtek
|
||||||
|
chip_name: ALC245
|
||||||
|
vendor_id: 0x10ec0245
|
||||||
|
subsystem_id: 0x1558a743
|
||||||
|
revision_id: 0x100001
|
||||||
|
0x12: 0x90a60130
|
||||||
|
0x13: 0x40000000
|
||||||
|
0x14: 0x90170110
|
||||||
|
0x17: 0x411111f0
|
||||||
|
0x18: 0x411111f0
|
||||||
|
0x19: 0x411111f0
|
||||||
|
0x1a: 0x411111f0
|
||||||
|
0x1b: 0x411111f0
|
||||||
|
0x1d: 0x40789b2d
|
||||||
|
0x1e: 0x411111f0
|
||||||
|
0x21: 0x04211020
|
||||||
|
hdaudioC0D2
|
||||||
|
vendor_name: Intel
|
||||||
|
chip_name: Meteor Lake HDMI
|
||||||
|
vendor_id: 0x8086281d
|
||||||
|
subsystem_id: 0x80860101
|
||||||
|
revision_id: 0x100000
|
||||||
|
0x04: 0x18560010
|
||||||
|
0x06: 0x18560010
|
||||||
|
0x08: 0x18560010
|
||||||
|
0x0a: 0x18560010
|
||||||
|
0x0b: 0x18560010
|
||||||
|
0x0c: 0x18560010
|
||||||
|
0x0d: 0x18560010
|
||||||
|
0x0e: 0x18560010
|
||||||
|
0x0f: 0x18560010
|
||||||
113
models/darp11-b/ecspy.txt
Normal file
113
models/darp11-b/ecspy.txt
Normal file
|
|
@ -0,0 +1,113 @@
|
||||||
|
id 5570 rev 7
|
||||||
|
A0: data 1 mirror 1 pot 0 control 80
|
||||||
|
A1: data 0 mirror 0 pot 0 control 80
|
||||||
|
A2: data 0 mirror 0 pot 0 control 00
|
||||||
|
A3: data 0 mirror 0 pot 0 control 00
|
||||||
|
A4: data 1 mirror 1 pot 0 control 80
|
||||||
|
A5: data 0 mirror 0 pot 0 control 00
|
||||||
|
A6: data 0 mirror 0 pot 0 control 00
|
||||||
|
A7: data 0 mirror 0 pot 0 control 00
|
||||||
|
B0: data 0 mirror 0 pot 0 control 84
|
||||||
|
B1: data 1 mirror 1 pot 0 control 84
|
||||||
|
B2: data 1 mirror 1 pot 0 control 84
|
||||||
|
B3: data 1 mirror 1 pot 0 control 80
|
||||||
|
B4: data 1 mirror 1 pot 0 control 40
|
||||||
|
B5: data 1 mirror 1 pot 0 control 80
|
||||||
|
B6: data 1 mirror 1 pot 0 control 40
|
||||||
|
B7: data 1 mirror 1 pot 0 control 80
|
||||||
|
C0: data 1 mirror 1 pot 0 control 80
|
||||||
|
C1: data 1 mirror 1 pot 0 control 04
|
||||||
|
C2: data 1 mirror 1 pot 0 control 04
|
||||||
|
C3: data 0 mirror 0 pot 0 control 04
|
||||||
|
C4: data 1 mirror 1 pot 0 control 84
|
||||||
|
C5: data 0 mirror 0 pot 0 control 04
|
||||||
|
C6: data 0 mirror 0 pot 0 control 80
|
||||||
|
C7: data 1 mirror 1 pot 0 control 44
|
||||||
|
D0: data 1 mirror 1 pot 0 control 40
|
||||||
|
D1: data 1 mirror 1 pot 0 control 44
|
||||||
|
D2: data 1 mirror 1 pot 0 control 00
|
||||||
|
D3: data 1 mirror 1 pot 0 control 80
|
||||||
|
D4: data 1 mirror 1 pot 0 control 40
|
||||||
|
D5: data 1 mirror 1 pot 0 control 40
|
||||||
|
D6: data 1 mirror 1 pot 0 control 02
|
||||||
|
D7: data 1 mirror 1 pot 0 control 02
|
||||||
|
E0: data 1 mirror 1 pot 0 control 04
|
||||||
|
E1: data 1 mirror 1 pot 0 control 40
|
||||||
|
E2: data 1 mirror 1 pot 0 control 80
|
||||||
|
E3: data 1 mirror 1 pot 0 control 44
|
||||||
|
E4: data 1 mirror 1 pot 0 control 40
|
||||||
|
E5: data 1 mirror 1 pot 0 control 40
|
||||||
|
E6: data 0 mirror 0 pot 0 control 80
|
||||||
|
E7: data 1 mirror 1 pot 0 control 04
|
||||||
|
F0: data 0 mirror 0 pot 0 control 44
|
||||||
|
F1: data 1 mirror 1 pot 0 control 40
|
||||||
|
F2: data 1 mirror 1 pot 0 control 44
|
||||||
|
F3: data 1 mirror 1 pot 0 control 44
|
||||||
|
F4: data 1 mirror 1 pot 0 control 04
|
||||||
|
F5: data 1 mirror 1 pot 0 control 04
|
||||||
|
F6: data 0 mirror 0 pot 0 control 00
|
||||||
|
F7: data 1 mirror 1 pot 1 control 40
|
||||||
|
G0: data 1 mirror 1 pot 0 control 80
|
||||||
|
G1: data 1 mirror 1 pot 0 control 80
|
||||||
|
G2: data 1 mirror 1 pot 0 control 80
|
||||||
|
G3: data 0 mirror 0 pot 0 control 00
|
||||||
|
G4: data 0 mirror 0 pot 0 control 00
|
||||||
|
G5: data 0 mirror 0 pot 0 control 00
|
||||||
|
G6: data 0 mirror 0 pot 0 control 40
|
||||||
|
G7: data 0 mirror 0 pot 0 control 00
|
||||||
|
H0: data 1 mirror 1 pot 0 control 80
|
||||||
|
H1: data 1 mirror 1 pot 0 control 80
|
||||||
|
H2: data 0 mirror 0 pot 0 control 44
|
||||||
|
H3: data 1 mirror 1 pot 0 control 80
|
||||||
|
H4: data 1 mirror 1 pot 0 control 80
|
||||||
|
H5: data 1 mirror 1 pot 0 control 40
|
||||||
|
H6: data 1 mirror 1 pot 0 control 80
|
||||||
|
H7: data 1 mirror 1 pot 0 control 80
|
||||||
|
I0: data 0 mirror 0 pot 0 control 00
|
||||||
|
I1: data 0 mirror 0 pot 0 control 00
|
||||||
|
I2: data 1 mirror 1 pot 0 control 84
|
||||||
|
I3: data 0 mirror 0 pot 0 control 00
|
||||||
|
I4: data 0 mirror 0 pot 0 control 00
|
||||||
|
I5: data 0 mirror 0 pot 0 control 40
|
||||||
|
I6: data 0 mirror 0 pot 0 control 00
|
||||||
|
I7: data 0 mirror 0 pot 0 control 00
|
||||||
|
J0: data 0 mirror 0 pot 0 control 40
|
||||||
|
J1: data 1 mirror 1 pot 0 control 40
|
||||||
|
J2: data 0 mirror 0 pot 0 control 00
|
||||||
|
J3: data 0 mirror 0 pot 0 control 80
|
||||||
|
J4: data 1 mirror 1 pot 0 control 40
|
||||||
|
J5: data 0 mirror 0 pot 0 control 80
|
||||||
|
J6: data 0 mirror 0 pot 0 control 44
|
||||||
|
J7: data 0 mirror 0 pot 0 control 84
|
||||||
|
M0: data 1 mirror 1 control 06
|
||||||
|
M1: data 1 mirror 1 control 06
|
||||||
|
M2: data 1 mirror 1 control 06
|
||||||
|
M3: data 1 mirror 1 control 06
|
||||||
|
M4: data 0 mirror 0 control 06
|
||||||
|
M5: data 1 mirror 1 control 00
|
||||||
|
M6: data 1 mirror 1 control 86
|
||||||
|
M7: data 0 mirror 0 control 00
|
||||||
|
GCR: 0x04
|
||||||
|
GCR1: 0x00
|
||||||
|
GCR2: 0x10
|
||||||
|
GCR3: 0x40
|
||||||
|
GCR4: 0x00
|
||||||
|
GCR5: 0x00
|
||||||
|
GCR6: 0x00
|
||||||
|
GCR7: 0x00
|
||||||
|
GCR8: 0x10
|
||||||
|
GCR9: 0x20
|
||||||
|
GCR10: 0x02
|
||||||
|
GCR11: 0x00
|
||||||
|
GCR12: 0x00
|
||||||
|
GCR13: 0x00
|
||||||
|
GCR14: 0x00
|
||||||
|
GCR15: 0x10
|
||||||
|
GCR16: 0x00
|
||||||
|
GCR17: 0x00
|
||||||
|
GCR18: 0x00
|
||||||
|
GCR19: 0x81
|
||||||
|
GCR20: 0x80
|
||||||
|
GCR21: 0x46
|
||||||
|
GCR22: 0x80
|
||||||
|
GCR23: 0x01
|
||||||
208
models/darp11-b/gpio.c
Normal file
208
models/darp11-b/gpio.c
Normal file
|
|
@ -0,0 +1,208 @@
|
||||||
|
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||||
|
|
||||||
|
#include <mainboard/gpio.h>
|
||||||
|
#include <soc/gpio.h>
|
||||||
|
|
||||||
|
static const struct pad_config gpio_table[] = {
|
||||||
|
PAD_CFG_NF(GPP_A0, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_A5, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_GPO(GPP_A7, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_A8, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_A9, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_A10, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_A11, 0, DEEP),
|
||||||
|
PAD_CFG_GPI(GPP_A12, NONE, DEEP),
|
||||||
|
PAD_CFG_TERM_GPO(GPP_A13, 1, UP_20K, PLTRST),
|
||||||
|
PAD_CFG_GPO(GPP_A14, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_A15, 0, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_A16, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_GPO(GPP_A17, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_A18, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_A19, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_A20, 0, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_A21, NATIVE, DEEP, NF1),
|
||||||
|
_PAD_CFG_STRUCT(GPP_B0, 0x80800100, 0x0000),
|
||||||
|
PAD_CFG_GPO(GPP_B1, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_B2, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_B3, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_B4, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_B5, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_B6, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_B7, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_B8, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_B9, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_B10, 0, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_B11, NONE, DEEP, NF2),
|
||||||
|
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_GPI(GPP_B14, NONE, DEEP),
|
||||||
|
PAD_CFG_GPI(GPP_B15, NONE, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_B16, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_B17, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_B18, 1, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_B19, 1, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_B20, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_B21, 0, PLTRST),
|
||||||
|
PAD_CFG_GPO(GPP_B22, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_B23, 0, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_C2, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_GPO(GPP_C3, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_C4, 0, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_C5, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_C6, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_GPO(GPP_C7, 0, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_GPO(GPP_C10, 0, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_C11, NONE, PWROK, NF1),
|
||||||
|
PAD_CFG_NF(GPP_C12, NONE, PWROK, NF1),
|
||||||
|
PAD_CFG_GPO(GPP_C13, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_C14, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_C15, 0, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_C16, NONE, PLTRST, NF1),
|
||||||
|
PAD_CFG_NF(GPP_C17, NONE, PLTRST, NF1),
|
||||||
|
PAD_CFG_GPO(GPP_C18, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_C19, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_C20, 0, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_C22, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_C23, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_GPO(GPP_D0, 1, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_D1, 1, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_D2, 1, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_D3, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_D4, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_D5, 1, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_D6, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_D7, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_D8, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_D9, 0, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_D10, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_D11, NATIVE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_D12, NATIVE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_D13, NATIVE, DEEP, NF1),
|
||||||
|
PAD_CFG_GPO(GPP_D14, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_D15, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_D16, 0, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_D18, NONE, PLTRST, NF1),
|
||||||
|
PAD_CFG_NF(GPP_D19, NONE, PLTRST, NF1),
|
||||||
|
PAD_CFG_NF(GPP_D20, NONE, PLTRST, NF1),
|
||||||
|
PAD_CFG_NF(GPP_D21, NONE, PLTRST, NF2),
|
||||||
|
PAD_CFG_NF(GPP_D22, NATIVE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_D23, NATIVE, DEEP, NF1),
|
||||||
|
PAD_CFG_GPO(GPP_E0, 0, DEEP),
|
||||||
|
_PAD_CFG_STRUCT(GPP_E1, 0x40100100, 0x3000),
|
||||||
|
PAD_CFG_GPI(GPP_E2, NONE, DEEP),
|
||||||
|
PAD_CFG_GPI(GPP_E3, NONE, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_E4, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_E5, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_E6, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_E7, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_E8, 0, DEEP),
|
||||||
|
PAD_CFG_GPI(GPP_E9, NONE, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_E10, 0, DEEP),
|
||||||
|
PAD_CFG_GPI(GPP_E11, NONE, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_E12, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_E13, 0, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_GPO(GPP_E15, 0, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_E16, NONE, DEEP, NF2),
|
||||||
|
PAD_CFG_GPO(GPP_E17, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_E18, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_E19, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_E20, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_E21, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_E22, 0, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_F1, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_F3, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_F5, NONE, DEEP, NF3),
|
||||||
|
PAD_CFG_GPO(GPP_F6, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_F7, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_F8, 0, DEEP),
|
||||||
|
PAD_CFG_GPI(GPP_F9, NONE, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_F10, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_F11, 0, DEEP),
|
||||||
|
_PAD_CFG_STRUCT(GPP_F12, 0x44002100, 0x0000),
|
||||||
|
_PAD_CFG_STRUCT(GPP_F13, 0x44002100, 0x0000),
|
||||||
|
PAD_CFG_GPO(GPP_F14, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_F15, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_F16, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_F17, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_F18, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_F19, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_F20, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_F21, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_F22, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_F23, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_H0, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_H1, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_H2, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_H3, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_H4, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_H5, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_H6, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_H7, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_H8, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_H9, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_H10, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_H11, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_H12, 0, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_H13, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_GPO(GPP_H14, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_H15, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_H16, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_H17, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_H18, 0, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_H20, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_H21, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_H22, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_GPO(GPP_S0, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_S1, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_S2, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_S3, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_S4, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_S5, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_S6, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_S7, 0, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_V0, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_V1, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_V2, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_V3, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_V4, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_V5, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_V6, NATIVE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_V7, NATIVE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_V8, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_V9, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_V10, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_V11, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_GPO(GPP_V12, 0, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_V13, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_V14, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_V15, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_V16, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_V17, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_GPO(GPP_V18, 0, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_V19, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_GPO(GPP_V20, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_V21, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_V22, 0, DEEP),
|
||||||
|
PAD_CFG_GPO(GPP_V23, 0, DEEP),
|
||||||
|
};
|
||||||
|
|
||||||
|
void mainboard_configure_gpios(void)
|
||||||
|
{
|
||||||
|
gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
|
||||||
|
}
|
||||||
42
models/darp11-b/hda_verb.c
Normal file
42
models/darp11-b/hda_verb.c
Normal file
|
|
@ -0,0 +1,42 @@
|
||||||
|
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||||
|
|
||||||
|
#include <device/azalia_device.h>
|
||||||
|
|
||||||
|
const u32 cim_verb_data[] = {
|
||||||
|
/* Realtek, ALC245 */
|
||||||
|
0x10ec0245, /* Vendor ID */
|
||||||
|
0x1558a743, /* Subsystem ID */
|
||||||
|
13, /* Number of entries */
|
||||||
|
AZALIA_SUBVENDOR(0, 0x1558a743),
|
||||||
|
AZALIA_RESET(1),
|
||||||
|
AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
|
||||||
|
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
|
||||||
|
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||||
|
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||||
|
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||||
|
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||||
|
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||||
|
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||||
|
AZALIA_PIN_CFG(0, 0x1d, 0x40789b2d),
|
||||||
|
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||||
|
AZALIA_PIN_CFG(0, 0x21, 0x04211020),
|
||||||
|
/* Intel, MeteorLakeHDMI */
|
||||||
|
0x8086281d, /* Vendor ID */
|
||||||
|
0x80860101, /* Subsystem ID */
|
||||||
|
11, /* Number of entries */
|
||||||
|
AZALIA_SUBVENDOR(2, 0x80860101),
|
||||||
|
AZALIA_RESET(1),
|
||||||
|
AZALIA_PIN_CFG(2, 0x04, 0x18560010),
|
||||||
|
AZALIA_PIN_CFG(2, 0x06, 0x18560010),
|
||||||
|
AZALIA_PIN_CFG(2, 0x08, 0x18560010),
|
||||||
|
AZALIA_PIN_CFG(2, 0x0a, 0x18560010),
|
||||||
|
AZALIA_PIN_CFG(2, 0x0b, 0x18560010),
|
||||||
|
AZALIA_PIN_CFG(2, 0x0c, 0x18560010),
|
||||||
|
AZALIA_PIN_CFG(2, 0x0d, 0x18560010),
|
||||||
|
AZALIA_PIN_CFG(2, 0x0e, 0x18560010),
|
||||||
|
AZALIA_PIN_CFG(2, 0x0f, 0x18560010),
|
||||||
|
};
|
||||||
|
|
||||||
|
const u32 pc_beep_verbs[] = {};
|
||||||
|
|
||||||
|
AZALIA_ARRAY_SIZES;
|
||||||
|
|
@ -1,3 +1,3 @@
|
||||||
version https://git-lfs.github.com/spec/v1
|
version https://git-lfs.github.com/spec/v1
|
||||||
oid sha256:847b7a22698b6dc3c114ee7553e75029de2de24df764241a823596fd6614c686
|
oid sha256:dd4e9576835042b456e3753cb4e4171551d9c721f1fa09bb5500be7869a96fdd
|
||||||
size 8818688
|
size 8818688
|
||||||
|
|
|
||||||
Loading…
Add table
Add a link
Reference in a new issue