Another fix for VHDL mode highlighting
* lisp/progmodes/vhdl-mode.el (vhdl-version): Bump to 3.38.5. (vhdl-compiler-alist): Fix the regexps and the doc string. Copyright-paperwork-exempt: yes
This commit is contained in:
Cyril Arnould
Eli Zaretskii
parent
7acae22f42
commit
61659f36c8
1 changed files with 37 additions and 23 deletions
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@ -16,7 +16,7 @@
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;; Reto also said in Apr 2021 that he preferred to keep the XEmacs
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;; compatibility code.
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(defconst vhdl-version "3.38.1"
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(defconst vhdl-version "3.38.5"
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"VHDL Mode version number.")
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(defconst vhdl-time-stamp "2015-03-12"
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@ -229,20 +229,20 @@ Overrides local variable `indent-tabs-mode'."
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;; [Error] Assignment error: variable is illegal target of signal assignment
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("ADVance MS" "vacom" "-work \\1" "make" "-f \\1"
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nil "valib \\1; vamap \\2 \\1" "./" "work/" "Makefile" "adms"
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("^\\s-+\\([0-9]+\\):\\s-+" nil 1 nil) ("^Compiling file \\(.+\\)" 1)
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("^\\s-+\\([0-9]+\\):\\s-+" nil 1 nil nil) ("^Compiling file \\(.+\\)" 1)
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("ENTI/\\1.vif" "ARCH/\\1-\\2.vif" "CONF/\\1.vif"
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"PACK/\\1.vif" "BODY/\\1.vif" upcase))
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;; Aldec
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;; COMP96 ERROR COMP96_0018: "Identifier expected." "test.vhd" 66 3
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("Aldec" "vcom" "-work \\1" "make" "-f \\1"
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nil "vlib \\1; vmap \\2 \\1" "./" "work/" "Makefile" "aldec"
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("^.* ERROR [^:]+: \".*\" \"\\([^ \t\n]+\\)\" \\([0-9]+\\) \\([0-9]+\\)" 1 2 3) ("" 0)
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("^.* ERROR [^:]+: \".*\" \"\\([^ \t\n]+\\)\" \\([0-9]+\\) \\([0-9]+\\)" 1 2 3 nil) ("" 0)
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nil)
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;; Cadence Leapfrog: cv -file test.vhd
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;; duluth: *E,430 (test.vhd,13): identifier (POSITIV) is not declared
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("Cadence Leapfrog" "cv" "-work \\1 -file" "make" "-f \\1"
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nil "mkdir \\1" "./" "work/" "Makefile" "leapfrog"
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("^duluth: \\*E,[0-9]+ (\\([^ \t\n]+\\),\\([0-9]+\\)):" 1 2 nil) ("" 0)
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("^duluth: \\*E,[0-9]+ (\\([^ \t\n]+\\),\\([0-9]+\\)):" 1 2 nil nil) ("" 0)
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("\\1/entity" "\\2/\\1" "\\1/configuration"
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"\\1/package" "\\1/body" downcase))
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;; Cadence Affirma NC vhdl: ncvhdl test.vhd
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@ -250,7 +250,7 @@ Overrides local variable `indent-tabs-mode'."
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;; (PLL_400X_TOP) is not declared [10.3].
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("Cadence NC" "ncvhdl" "-work \\1" "make" "-f \\1"
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nil "mkdir \\1" "./" "work/" "Makefile" "ncvhdl"
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("^ncvhdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3) ("" 0)
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("^ncvhdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3 nil) ("" 0)
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("\\1/entity/pc.db" "\\2/\\1/pc.db" "\\1/configuration/pc.db"
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"\\1/package/pc.db" "\\1/body/pc.db" downcase))
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;; ghdl vhdl
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@ -258,21 +258,21 @@ Overrides local variable `indent-tabs-mode'."
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;; bad_counter.vhdl:13:14: operator "=" is overloaded
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("GHDL" "ghdl" "-i --workdir=\\1 --ieee=synopsys -fexplicit " "make" "-f \\1"
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nil "mkdir \\1" "./" "work/" "Makefile" "ghdl"
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("^ghdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3) ("" 0)
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("^ghdl_p: \\*E,\\w+ (\\([^ \t\n]+\\),\\([0-9]+\\)|\\([0-9]+\\)):" 1 2 3 nil) ("" 0)
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("\\1/entity" "\\2/\\1" "\\1/configuration"
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"\\1/package" "\\1/body" downcase))
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;; IBM Compiler
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;; 00 COACHDL* | [CCHDL-1]: File: adder.vhd, line.column: 120.6
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("IBM Compiler" "g2tvc" "-src" "precomp" "\\1"
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nil "mkdir \\1" "./" "work/" "Makefile" "ibm"
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("^[0-9]+ COACHDL.*: File: \\([^ \t\n]+\\), *line.column: \\([0-9]+\\).\\([0-9]+\\)" 1 2 3) (" " 0)
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("^[0-9]+ COACHDL.*: File: \\([^ \t\n]+\\), *line.column: \\([0-9]+\\).\\([0-9]+\\)" 1 2 3 nil) (" " 0)
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nil)
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;; Ikos Voyager: analyze test.vhd
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;; analyze test.vhd
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;; E L4/C5: this library unit is inaccessible
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("Ikos" "analyze" "-l \\1" "make" "-f \\1"
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nil "mkdir \\1" "./" "work/" "Makefile" "ikos"
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("^E L\\([0-9]+\\)/C\\([0-9]+\\):" nil 1 2)
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("^E L\\([0-9]+\\)/C\\([0-9]+\\):" nil 1 2 nil)
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("^analyze +\\(.+ +\\)*\\(.+\\)$" 2)
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nil)
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;; ModelSim, Model Technology: vcom test.vhd
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@ -294,7 +294,7 @@ Overrides local variable `indent-tabs-mode'."
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;; test.vhd:34: error message
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("LEDA ProVHDL" "provhdl" "-w \\1 -f" "make" "-f \\1"
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nil "mkdir \\1" "./" "work/" "Makefile" "provhdl"
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("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil) ("" 0)
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("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil nil) ("" 0)
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("ENTI/\\1.vif" "ARCH/\\1-\\2.vif" "CONF/\\1.vif"
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"PACK/\\1.vif" "BODY/BODY-\\1.vif" upcase))
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;; Quartus compiler
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@ -305,21 +305,21 @@ Overrides local variable `indent-tabs-mode'."
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;; Warning: VHDL Process Statement warning at dvi2sdi_tst.vhd(172): ...
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("Quartus" "make" "-work \\1" "make" "-f \\1"
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nil "mkdir \\1" "./" "work/" "Makefile" "quartus"
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("^\\(Error\\|Warning\\): .* \\([^ \t\n]+\\)(\\([0-9]+\\))" 2 3 nil) ("" 0)
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("^\\(Error\\|Warning\\): .* \\([^ \t\n]+\\)(\\([0-9]+\\))" 2 3 nil nil) ("" 0)
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nil)
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;; QuickHDL, Mentor Graphics: qvhcom test.vhd
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;; ERROR: test.vhd(24): near "dnd": expecting: END
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;; WARNING[4]: test.vhd(30): A space is required between ...
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("QuickHDL" "qvhcom" "-work \\1" "make" "-f \\1"
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nil "mkdir \\1" "./" "work/" "Makefile" "quickhdl"
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("^\\(ERROR\\|WARNING\\)[^:]*: \\([^ \t\n]+\\)(\\([0-9]+\\)):" 2 3 nil) ("" 0)
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("^\\(ERROR\\|WARNING\\)[^:]*: \\([^ \t\n]+\\)(\\([0-9]+\\)):" 2 3 nil nil) ("" 0)
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("\\1/_primary.dat" "\\2/\\1.dat" "\\1/_primary.dat"
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"\\1/_primary.dat" "\\1/body.dat" downcase))
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;; Savant: scram -publish-cc test.vhd
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;; test.vhd:87: _set_passed_through_out_port(IIR_Boolean) not defined for
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("Savant" "scram" "-publish-cc -design-library-name \\1" "make" "-f \\1"
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nil "mkdir \\1" "./" "work._savant_lib/" "Makefile" "savant"
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("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil) ("" 0)
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("^\\([^ \t\n:]+\\):\\([0-9]+\\): " 1 2 nil nil) ("" 0)
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("\\1_entity.vhdl" "\\2_secondary_units._savant_lib/\\2_\\1.vhdl"
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"\\1_config.vhdl" "\\1_package.vhdl"
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"\\1_secondary_units._savant_lib/\\1_package_body.vhdl" downcase))
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@ -327,39 +327,39 @@ Overrides local variable `indent-tabs-mode'."
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;; Error: CSVHDL0002: test.vhd: (line 97): Invalid prefix
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("Simili" "vhdlp" "-work \\1" "make" "-f \\1"
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nil "mkdir \\1" "./" "work/" "Makefile" "simili"
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("^\\(Error\\|Warning\\): \\w+: \\([^ \t\n]+\\): (line \\([0-9]+\\)): " 2 3 nil) ("" 0)
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("^\\(Error\\|Warning\\): \\w+: \\([^ \t\n]+\\): (line \\([0-9]+\\)): " 2 3 nil nil) ("" 0)
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("\\1/prim.var" "\\2/_\\1.var" "\\1/prim.var"
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"\\1/prim.var" "\\1/_body.var" downcase))
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;; Speedwave (Innoveda): analyze -libfile vsslib.ini -src test.vhd
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;; ERROR[11]::File test.vhd Line 100: Use of undeclared identifier
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("Speedwave" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1"
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nil "mkdir \\1" "./" "work/" "Makefile" "speedwave"
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("^ *ERROR\\[[0-9]+]::File \\([^ \t\n]+\\) Line \\([0-9]+\\):" 1 2 nil) ("" 0)
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("^ *ERROR\\[[0-9]+]::File \\([^ \t\n]+\\) Line \\([0-9]+\\):" 1 2 nil nil) ("" 0)
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nil)
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;; Synopsys, VHDL Analyzer (sim): vhdlan -nc test.vhd
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;; **Error: vhdlan,703 test.vhd(22): OTHERS is not legal in this context.
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("Synopsys" "vhdlan" "-nc -work \\1" "make" "-f \\1"
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nil "mkdir \\1" "./" "work/" "Makefile" "synopsys"
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("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil) ("" 0)
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("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil nil) ("" 0)
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("\\1.sim" "\\2__\\1.sim" "\\1.sim" "\\1.sim" "\\1__.sim" upcase))
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;; Synopsys, VHDL Analyzer (syn): vhdlan -nc -spc test.vhd
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;; **Error: vhdlan,703 test.vhd(22): OTHERS is not legal in this context.
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("Synopsys Design Compiler" "vhdlan" "-nc -spc -work \\1" "make" "-f \\1"
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nil "mkdir \\1" "./" "work/" "Makefile" "synopsys_dc"
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("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil) ("" 0)
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("^\\*\\*Error: vhdlan,[0-9]+ \\([^ \t\n]+\\)(\\([0-9]+\\)):" 1 2 nil nil) ("" 0)
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("\\1.syn" "\\2__\\1.syn" "\\1.syn" "\\1.syn" "\\1__.syn" upcase))
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;; Synplify:
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;; @W:"test.vhd":57:8:57:9|Optimizing register bit count_x(5) to a constant 0
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("Synplify" "n/a" "n/a" "make" "-f \\1"
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nil "mkdir \\1" "./" "work/" "Makefile" "synplify"
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("^@[EWN]:\"\\([^ \t\n]+\\)\":\\([0-9]+\\):\\([0-9]+\\):" 1 2 3) ("" 0)
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("^@[EWN]:\"\\([^ \t\n]+\\)\":\\([0-9]+\\):\\([0-9]+\\):" 1 2 3 nil) ("" 0)
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nil)
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;; Vantage: analyze -libfile vsslib.ini -src test.vhd
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;; Compiling "test.vhd" line 1...
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;; **Error: LINE 49 *** No aggregate value is valid in this context.
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("Vantage" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1"
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nil "mkdir \\1" "./" "work/" "Makefile" "vantage"
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("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil)
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("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil nil)
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("^ *Compiling \"\\(.+\\)\" " 1)
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nil)
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;; VeriBest: vc vhdl test.vhd
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@ -369,26 +369,26 @@ Overrides local variable `indent-tabs-mode'."
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;; [Error] Name BITA is unknown
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("VeriBest" "vc" "vhdl" "make" "-f \\1"
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nil "mkdir \\1" "./" "work/" "Makefile" "veribest"
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("^ +\\([0-9]+\\): +[^ ]" nil 1 nil) ("" 0)
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("^ +\\([0-9]+\\): +[^ ]" nil 1 nil nil) ("" 0)
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nil)
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;; Viewlogic: analyze -libfile vsslib.ini -src test.vhd
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;; Compiling "test.vhd" line 1...
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;; **Error: LINE 49 *** No aggregate value is valid in this context.
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("Viewlogic" "analyze" "-libfile vsslib.ini -src" "make" "-f \\1"
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nil "mkdir \\1" "./" "work/" "Makefile" "viewlogic"
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("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil)
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("^\\*\\*Error: LINE \\([0-9]+\\) \\*\\*\\*" nil 1 nil nil)
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("^ *Compiling \"\\(.+\\)\" " 1)
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nil)
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;; Xilinx XST:
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;; ERROR:HDLParsers:164 - "test.vhd" Line 3. parse error
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("Xilinx XST" "xflow" "" "make" "-f \\1"
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nil "mkdir \\1" "./" "work/" "Makefile" "xilinx"
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("^ERROR:HDLParsers:[0-9]+ - \"\\([^ \t\n]+\\)\" Line \\([0-9]+\\)\\." 1 2 nil) ("" 0)
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("^ERROR:HDLParsers:[0-9]+ - \"\\([^ \t\n]+\\)\" Line \\([0-9]+\\)\\." 1 2 nil nil) ("" 0)
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nil)
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;; Xilinx Vivado:
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;; ERROR: [VRFC 10-1412] syntax error near o_idle [test.vhd:23]
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("Xilinx Vivado" "xvhdl" "" "make" "-f \\1"
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nil "mkdir \\1" "./" "work" "Makefile" "vivado"
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nil "mkdir \\1" "./" "work/" "Makefile" "vivado"
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("^\\(?:\\(?1:ERROR\\)\\|\\(?2:WARNING\\)\\|\\(?3:INFO\\)\\): \\(.+\\) \\[\\(?4:[^ \t\n]+\\):\\(?5:[0-9]+\\)\\]" 4 5 nil (2 . 3)) ("" 0)
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("\\1/entity" "\\2/\\1" "\\1/configuration"
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"\\1/package" "\\1/body" downcase))
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@ -414,6 +414,13 @@ Error message:
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File subexp index: index of subexpression that matches the file name
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Line subexp index: index of subexpression that matches the line number
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Column subexp idx: index of subexpression that matches the column number
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Type subexp : message type, can be nil for a real error, 1 for warning
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or 0 for info. Type can also be detected using the form
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(WARNING . INFO). In that case this will be equivalent to
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1 if the WARNING’th subexpression matched or else
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equivalent to 0 if the INFO’th subexpression matched, or
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else equivalent to nil if neither of them matched. See
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also `compilation-error-regexp-alist'.
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File message:
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Regexp : regular expression to match a file name message
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File subexp index: index of subexpression that matches the file name
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@ -483,7 +490,14 @@ NOTE: Activate new error and file message regexps and reflect the new setting
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(integer :tag "Line subexp index")
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(choice :tag "Column subexp "
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(integer :tag "Index")
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(const :tag "No column number" nil)))
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(const :tag "No column number" nil))
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(choice :tag "Type "
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(const :tag "Info" 0)
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(const :tag "Warning" 1)
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(const :tag "Error" nil)
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(cons :tag "Type detection"
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(natnum :tag "Warning subexp index")
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(natnum :tag "Info subexp index "))))
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(list :tag "File message" :indent 4
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(regexp :tag "Regexp ")
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(integer :tag "File subexp index"))
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